HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 145

• Manufacturer Part Number: HD6417144
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

The user break controller (UBC) provides functions that make program debugging easier. By
setting break conditions in the UBC, a user break interrupt is generated according to the contents
of the bus cycle generated by the CPU or DMAC/DTC. This function makes it easy to design an
effective self-monitoring debugger, and customers of the chip can easily debug their programs
without using a large in-circuit emulator.
7.1
• There are 5 types of break compare conditions as follows:
• User break interrupt generated upon satisfying break conditions
• User break interrupt generated before an instruction is executed by selecting break in the CPU
• Module standby mode can be set
UBC0001A_000020010800
⎯ Address
⎯ CPU cycle or DMAC/DTC cycle
⎯ Instruction fetch or data access
⎯ Read or write
⎯ Operand size: longword/word/byte
instruction fetch.
Features
Section 7 User Break Controller (UBC)
Rev.4.00 Mar. 27, 2008 Page 101 of 882
7. User Break Controller (UBC)
REJ09B0108-0400