Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 152

• Manufacturer Part Number: Z8F16800144ZCOG
• Description: KIT DEV FOR Z8F642 MCU 44 PIN
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F16800144ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F642
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4678

PS025011-1010
Watchdog Timer Refresh
Watchdog Timer Timeout Response
When first enabled, the WDT is loaded with the value in the WDT Reload registers. The
WDT then counts down to
Execution of the
Reload value stored in the WDT Reload registers. Counting resumes following the reload
operation.
When Z8 Encore! is operating in DEBUG Mode (through the OCD), the WDT is
continuously refreshed to prevent unnecessary WDT timeouts.
The WDT times out when the counter reaches
either a system exception or a Reset. The
response of the WDT. For information on programming of the
Flash Option Bits
WDT System Exception in Normal Operation
If configured to generate a system exception when a timeout occurs, the WDT issues an
exception request to the interrupt controller. The eZ8 CPU responds to the request by
fetching the System Exception vector and executing code from the vector address. After
timeout and system exception generation, the WDT is reloaded automatically and 
continues counting.
WDT System Exception in STOP Mode
The WDT automatically initiates a Stop Mode Recovery and generates a system exception
request if configured to generate a system exception when a timeout occurs and 
the Z8 Encore! XP F1680 Series is in STOP mode. Both
the Reset Status register are set to 1 following WDT timeout in STOP mode.
Following completion of the Stop Mode Recovery the eZ8 CPU responds to the system
exception request by fetching the System Exception vector and executing code from the
vector address.
WDT Reset in Normal Operation
The WDT forces the device into the Reset state if configured to generate a Reset when a
timeout occurs. The WDT status bit is set to 1, see
more information on Reset and the
Low-Voltage Detection
initialized with its reset value.
WDT
on page 267.
instruction causes the downcounter to be reloaded with the WDT
on page 33. Following a Reset sequence, the WDT Counter is
0000H
P R E L I M I N A R Y
unless a
WDT
status bit, see
WDT_RES
WDT
0000H
instruction is executed by the eZ8 CPU.
Reset Status Register
Option Bit determines the timeout
. A timeout of the WDT generates
Reset, Stop Mode Recovery, and
Z8 Encore! XP
WDT
status bit and the
WDT_RES
Product Specification
on page 42. For
®
Option Bit, see
F1680 Series
Watchdog Timer
STOP
bit in
138