Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 372
Z8F16800144ZCOG
Manufacturer Part Number
Z8F16800144ZCOG
Description
KIT DEV FOR Z8F642 MCU 44 PIN
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Specifications of Z8F16800144ZCOG
Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F642
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4678
- Current page: 372 of 399
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PS025011-1010
(Output)
(Output)
TXD
(Input)
Table 207. UART Timing with CTS
Parameter
UART
T
T
T
CTS
1
2
3
DE
UART Timing
Figure 78
CTS is used for flow control. The CTS to DE assertion delay (T1) assumes that the trans-
mit data register has been loaded with data prior to CTS assertion.
Figure 79
case where CTS is not used for flow control. DE asserts after the transmit data register has
been written. DE remains asserted for multiple characters as long as the transmit data
register is written with the next character before the current character has completed.
bit 7
Abbreviation
CTS Fall to DE output delay
DE assertion to TXD falling edge (start bit) delay ± 5
End of Stop Bit(s) to DE deassertion delay
parity
and
and
Table 207
Table 208
stop
Figure 78. UART Timing With CTS
end of
stop bit(s)
T 3
provide timing information for UART pins for the case where
on page 359 provide timing information for UART pins for the
P R E L I M I N A R Y
T 1
2 * XIN period 2 * XIN period
± 5
Z8 Encore! XP
Min
T 2
Delay (ns)
Product Specification
start
Electrical Characteristics
+ 1 bit time
®
Max
F1680 Series
bit 0
bit 1
358
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