Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 229

• Manufacturer Part Number: Z8F16800144ZCOG
• Description: KIT DEV FOR Z8F642 MCU 44 PIN
• Manufacturer: Zilog
• Series: Z8 Encore!®r
• Type: MCUr

Specifications of Z8F16800144ZCOG

• Contents: Hardware, Software and Documentation
• For Use With/related Products: Z8F642
• For Use With: 269-4661 - KIT ACC ETHERNET SMART CABLE
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 269-4678

I
PS025011-1010
2
C Master/Slave Controller
Architecture
The I
bus-compatible with the I
and a serial clock signal (SCL) bidirectional lines. The features of I
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•
•
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Figure 42
Operates in MASTER/SLAVE or SLAVE ONLY modes.
Supports arbitration in a multimaster environment (MASTER/SLAVE mode).
Supports data rates up to 400 Kbps.
7-bit or 10-bit slave address recognition (interrupt only on address match).
Optional general call address recognition.
Optional digital filter on receive SDA, SCL lines.
Optional interactive receive mode allows software interpretation of each received
address and/or data byte before acknowledging.
Unrestricted number of data bytes per transfer.
Baud Rate Generator can be used as a general-purpose timer with an interrupt, if the
I
2
2
C controller is disabled.
C Master/Slave Controller ensures that the Z8 Encore! XP F1680 Series devices are
on page 216 displays the architecture of the I
2
C protocol. The I
P R E L I M I N A R Y
2
C bus consists of the serial data signal (SDA)
2
Z8 Encore! XP
C controller.
Product Specification
I2C Master/Slave Controller
2
C controller include:
®
F1680 Series
215