Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 193

KIT DEV FOR Z8F642 MCU 44 PIN

Z8F16800144ZCOG

Manufacturer Part Number
Z8F16800144ZCOG
Description
KIT DEV FOR Z8F642 MCU 44 PIN
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Datasheets

Specifications of Z8F16800144ZCOG

Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F642
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4678
PS025011-1010
Baud Rate
IR_RXD
UART’s
Clock
RXD
Caution:
Receiving IrDA Data
8-clock
delay
Start Bit = 0
Data received from the infrared transceiver using the
is decoded by the Infrared Endec and passed to the UART. The UART’s baud rate clock is
used by the Infrared Endec to generate the demodulated signal (
UART. Each UART/Infrared data bit is 16 clocks wide.
When the Infrared Endec is enabled, the UART’s
Z8 Encore! XP F1680 Series products while the
RXD pin.
Infrared Data Reception
Endec Receiver Synchronization
The IrDA receiver uses a local baud rate clock counter (0 to 15 clock periods) to generate
an input stream for the UART and to create a sampling window for detection of incoming
pulses. The generated UART input (UART RXD) is delayed by 8 baud rate clock periods
with respect to the incoming IrDA data stream. When a falling edge in the input data
stream is detected, the Endec counter is reset. When the count reaches a value of 8, the
UART RXD value is updated to reflect the value of the decoded data. When the count
reaches 12 baud clock periods, the sampling window for the next incoming pulse opens.
16-clock
min. 1.4
period
The system clock frequency must be at least 1.0 MHz to ensure proper reception of the
1.4
pulse
Start Bit = 0
s minimum width pulses allowed by the IrDA standard.
16-clock
s
period
Data Bit 0 = 1
Figure 29. IrDA Data Reception
Data Bit 0 = 1
P R E L I M I N A R Y
16-clock
period
Data Bit 1 = 0
Data Bit 1 = 0
16-clock
period
IR_RXD
RXD
Data Bit 2 = 1
IR_RXD
signal is internal to the
Z8 Encore! XP
Figure 29
signal is received through the
Data Bit 2 = 1
signal through the RXD pin
16-clock
RXD
period
Product Specification
displays data reception.
Infrared Encoder/Decoder
) that drives the
Data Bit 3 = 1
®
F1680 Series
Data Bit 3 = 1
179

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