Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 77
Z8F16800144ZCOG
Manufacturer Part Number
Z8F16800144ZCOG
Description
KIT DEV FOR Z8F642 MCU 44 PIN
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Specifications of Z8F16800144ZCOG
Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F642
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4678
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Table 20. Port A–E Control Registers (PxCTL)
BITS
FIELD
RESET
R/W
ADDR
PS025011-1010
PADDR[7:0]
00H
01H
02H
03H
04H
05H
06H
07H
08H
09H–FFH
Port A–E Control Registers
Port A–E Data Direction Subregisters
R/W
7
The Port A–E Control registers set the GPIO port operation. The value in the
corresponding Port A–E Address register determines which subregister is read from or
written to by a Port A–E Control register transaction, see
PCTL[7:0]—Port Control
The Port Control register provides access to all subregisters that configure the GPIO Port
operation.
The Port A–E Data Direction subregister is accessed through the Port A–E Control
register by writing
Port Control Subregister Accessible using the Port A–E Control Registers
No function. Provides some protection against accidental port reconfiguration
Data Direction
Alternate Function
Output Control (Open-Drain)
High Drive Enable
Stop Mode Recovery Source Enable
Pull-up Enable
Alternate Function Set 1
Alternate Function Set 2
No function
R/W
6
01H
R/W
5
to the Port A–E Address register, see
FD1H, FD5H, FD9H, FDDH, FE1H
P R E L I M I N A R Y
R/W
4
PCTL
00H
R/W
3
Z8 Encore! XP
Table 20
R/W
2
Table
General-Purpose Input/Output
Product Specification
21.
R/W
1
®
F1680 Series
R/W
0
63
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