Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 227
Z8F16800144ZCOG
Manufacturer Part Number
Z8F16800144ZCOG
Description
KIT DEV FOR Z8F642 MCU 44 PIN
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Specifications of Z8F16800144ZCOG
Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F642
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4678
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Table 117. ESPI Baud Rate High Byte Register (ESPIBRH)
Table 118. ESPI Baud Rate Low Byte Register (ESPIBRL)
PS025011-1010
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
ESPI Baud Rate High and Low Byte Registers
R/W
R/W
7
1
7
1
The ESPI Baud Rate High and Low Byte registers (see
to form a 16-bit reload value, BRG[15:0], for the ESPI Baud Rate Generator. The ESPI
baud rate is calculated using the following equation:
Minimum baud rate is obtained by setting BRG[15:0] to
of (2 x 65536 = 131072).
BRH = ESPI Baud Rate High Byte
Most significant byte, BRG[15:8], of the ESPI Baud Rate Generator’s Reload value.
BRL = ESPI Baud Rate Low Byte
Least significant byte, BRG[7:0], of the ESPI Baud Rate Generator’s Reload value.
I Baud Rate bits s
R/W
R/W
6
1
6
1
R/W
R/W
5
1
5
1
P R E L I M I N A R Y
=
System Clock Frequency Hz
-------------------------------------------------------------------------------------- -
R/W
R/W
4
1
4
1
F66H
F67H
BRH
BRL
2
R/W
R/W
BRG[15:0]
3
1
3
1
Table 117
Z8 Encore! XP
Enhanced Serial Peripheral Interface
0000H
R/W
R/W
2
1
2
1
for a clock divisor value
Product Specification
and
Table
R/W
R/W
1
1
1
1
®
F1680 Series
118) combine
R/W
R/w
0
1
0
1
213
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