Z8F16800144ZCOG Zilog, Z8F16800144ZCOG Datasheet - Page 171
Z8F16800144ZCOG
Manufacturer Part Number
Z8F16800144ZCOG
Description
KIT DEV FOR Z8F642 MCU 44 PIN
Manufacturer
Zilog
Series
Z8 Encore!®r
Type
MCUr
Specifications of Z8F16800144ZCOG
Contents
Hardware, Software and Documentation
For Use With/related Products
Z8F642
For Use With
269-4661 - KIT ACC ETHERNET SMART CABLE
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4678
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Noise Filter
PS025011-1010
Architecture
Operation
A noise filter circuit is included which filters noise on a digital input signal (such as UART
Receive Data) before the data is sampled by the block. This is likely to be a requirement
for protocols with a noisy environment.
The noise filter contains the following features:
•
•
•
•
•
Figure 25
network.
Figure 26
noise. The noise filter in this example is a 2-bit up/down counter which saturates at
Synchronizes the receive input data to the System Clock.
Noise Filter Enable (
or included (
Noise Filter Control (
counter digital filter. The available width ranges from 4 to 11 bits.
The digital filter output features hysteresis.
Provides an active low Saturated State output (
of the presence of noise.
displays how the noise filter is integrated with the LIN-UART on a LIN
on page 158 displays the operation of the noise filter both with and without
Figure 25. Noise Filter System Block Diagram
NFEN = 1
NFEN
NFCTL[2:0]
) in the receive data path.
P R E L I M I N A R Y
) input selects whether the noise filter is bypassed (
) input selects the width of the up/down saturating
FiltSatB
Z8 Encore! XP
) which is used as an indication
Product Specification
®
F1680 Series
NFEN
LIN-UART
00b
= 0)
157
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