HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 126

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 3 DSP Operating Unit
The rule is shown in table 3.3.
Table 3.3
Note: The terms used above in table 3.3, are defined as follows.
Repeat Control Instructions and Repeat Control Macros: To describe a repeat loop, the RS
and RE registers must be specified appropriately by the LDRS and LDRS instructions and then the
number of repetitions must be specified by the SERTC instruction. An 8-bit immediate data or a
general register can be used as an operand of the SETRC instruction. To specify the RC as a value
greater than 256, use SETRC Rm type instructions.
Table 3.4
The RS and RE registers must be specified appropriately according to the rules shown in table 3.3.
The SH assembler supports control macros (REPEAT) as shown in table 3.5 to solve problems.
Rev. 1.00 Dec. 27, 2005 Page 82 of 1044
REJ09B0269-0100
RS
RE
Instruction
LDRS @(disp,PC)
LDRE @(disp,PC)
SETRC #imm
SETRC Rm
RptStart: Address of the repeat start instruction
RptStart0: Address of the instruction one instruction prior to the repeat start instruction
RptEnd3: Address of the instruction three instructions prior to the repeat end instruction
1
RptStart0 + 8
RptStart0 + 4
RS and RE Setting Rule
Repeat Control Instructions
Operation
Calculates (disp x 2 + PC) and stores the result to the
RS register
Calculates (disp x 2 + PC) and stores the result to the
RE register
Sets 8-bit immediate data imm to the RC[11:0] bits of
the SR register and sets the information related to the
number of repetitions to the RF[1:0] bits of the SR.
RC[11:0] can be specified as 0 to 255.
Sets the[11:0] bits of the Rm register to the RC[11:0]
bits of the SR register and sets the information related
to the number of repetitions to the RF[1:0] bits of the
SR.
RC[11:0] can be specified as 0 to 4095.
2
RptStart0 + 6
RptStart0 + 4
Number of Instructions in Repeat Loop
RptStart0 + 4
3
RptStart0 + 4
≥ 4
RptStart
RptEnd3 + 4
Number of
Execution States
1
1
1
1