HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 92

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 2 CPU
Note: For addressing modes with displacement (disp) as shown below, the assembler description
2.5.3
Table 2.4 shows the instruction formats, and the meaning of the source and destination operands,
for instructions executed by the CPU core. The meaning of the operands depends on the
instruction code. The following symbols are used in the table.
Rev. 1.00 Dec. 27, 2005 Page 48 of 932
REJ09B0269-0100
Addressing
Mode
PC-relative
Immediate
in this manual indicates the value before it is scaled (x 1, x2, or x4) according to the
operand size to clarify the LSI operation. For details on assembler description, refer to the
description rules in each assembler.
CPU Instruction Formats
dddd: Displacement
@ (disp:4, Rn) ; Register indirect with displacement
@ (disp:8, GBR)
@ (disp:8, PC) ; PC relative with displacement
disp:8, disp
xxxx: Instruction code
mmmm:
nnnn: Destination register
iiii:
Instruction
Format
Rn
#imm:8
#imm:8
#imm:8
Immediate data
; PC relative
Source register
8-bit immediate data imm of TRAPA
Effective Address Calculation Method
Effective address is sum of PC and Rn.
8-bit immediate data imm of TST, AND,
OR, or XOR instruction is zero-extended.
8-bit immediate data imm of MOV, ADD, or
CMP/EQ instruction is sign-extended.
instruction is zero-extended and multiplied
by 4.
Rn
PC
; GBR indirect with displacement
+
PC + Rn
Calculation
Formula
PC + Rn
—
—
—