HD6417712BPV Renesas Electronics America, HD6417712BPV Datasheet - Page 848

• Manufacturer Part Number: HD6417712BPV
• Description: MPU 1.5/3.3V 0K PB-FREE 256-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH Ethernetr

Specifications of HD6417712BPV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, FIFO, SCI, SIO
• Peripherals: DMA, POR, WDT
• Number Of I /o: 24
• Program Memory Type: ROMless
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 256-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 22 User Debugging Interface (H-UDI)
22.4.4
An H-UDI reset is executed by inputting an H-UDI reset assert command in SDIR. An H-UDI
reset is of the same kind as a power-on reset. An H-UDI reset is released by inputting an H-UDI
reset negate command. The required time between the H-UDI reset assert command and H-UDI
reset negate command is the same as time for keeping the RESETP pin low to apply a power-on
reset.
22.4.5
The H-UDI interrupt function generates an interrupt by setting a command from the H-UDI in the
SDIR. An H-UDI interrupt is a general exception/interrupt operation, resulting in a branch to an
address based on the VBR value plus offset, and with return by the RTE instruction. This interrupt
request has a fixed priority level of 15.
H-UDI interrupts are accepted in sleep mode.
Rev. 1.00 Dec. 27, 2005 Page 804 of 932
REJ09B0269-0100
Chip internal reset
TCK
TDO
(when the H-UDI
command is set)
TDO
(when the JTAG
command is set)
CPU state
H-UDI Reset
H-UDI Interrupt
SDIR
H-UDI reset assert
Figure 22.3 H-UDI Data Transfer Timing
Figure 22.4 H-UDI Reset
t
TDO
H-UDI reset negate
t
TDO
Branch to H'A0000000