PNX1311EH/G,557 NXP Semiconductors, PNX1311EH/G,557 Datasheet - Page 318
![IC MEDIA PROC 166MHZ 292-HBGA](/photos/6/76/67651/pnx1311eh_g_sml.jpg)
PNX1311EH/G,557
Manufacturer Part Number
PNX1311EH/G,557
Description
IC MEDIA PROC 166MHZ 292-HBGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1300EHG557.pdf
(549 pages)
Specifications of PNX1311EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
48K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
169
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
292-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Other names
568-1295
935277721557
PNX1311EH/G
935277721557
PNX1311EH/G
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Philips Semiconductors
Read clock cycle counter, least-significant word
SYNTAX
FUNCTION
DESCRIPTION
cycles
register, rdest. The contents of the master counter are transferred to the slave CCCOUNT register only on a
successful interruptible jump and on processor reset. Thus, if
intervening interruptible jumps, the operation pair is guaranteed to be a coherent sample of the master clock-cycle
counter. The master counter increments on all cycles (processor-stall and non-stall) if PCSW.CS = 1; otherwise, the
counter increments only on non-stall cycles.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
CCCOUNT_HR = 0xabcdefff12345678
r10 = 0, CCCOUNT_HR = 0xabcdefff12345678
r20 = 1, CCCOUNT_HR = 0xabcdefff12345678
Refer to
The
[ IF rguard ] cycles
if rguard then
rdest
cycles
operation copies the low 32 bits of the slave register of Clock Cycle Counter (CCCOUNT) to the destination
Section 3.1.5, “CCCOUNT—Clock Cycle Counter”
CCCOUNT<31:0>
Initial Values
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
rdest
cycles
IF r10 cycles
IF r20 cycles
r60
Operation
PRELIMINARY SPECIFICATION
for a description of the CCCOUNT operation. The
cycles
r70
r100
PNX1300/01/02/11 DSPCPU Operations
and
hicycles
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
r30
no change, since guard is false
r100
hicycles curcycles
0x12345678
0x12345678
ATTRIBUTES
writepcsw
SEE ALSO
are executed without
Result
cycles
fcomp
154
No
—
0
1
3
A-20
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