PNX1311EH/G,557 NXP Semiconductors, PNX1311EH/G,557 Datasheet - Page 504
PNX1311EH/G,557
Manufacturer Part Number
PNX1311EH/G,557
Description
IC MEDIA PROC 166MHZ 292-HBGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1300EHG557.pdf
(549 pages)
Specifications of PNX1311EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
48K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
169
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
292-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Other names
568-1295
935277721557
PNX1311EH/G
935277721557
PNX1311EH/G
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Philips Semiconductors
Write destination program counter
SYNTAX
FUNCTION
DESCRIPTION
a hardware update (during an interruptible jump) and a software update (through a
software update takes precedence.
handling routine as a jump address to resume execution of the program that was running before the exception was
taken.
modification of DPC. If the LSB of rguard is 1, DPC is written; otherwise, DPC is unchanged.
EXAMPLES
r30 = 0xbeebee
r20 = 0, r31 = 0xabba
r21 = 1, r31 = 0xabba
The
Interruptible jumps write their target address to the DPC. The value of DPC is intended to be used by an exception-
The
[ IF rguard ] writedpc rsrc1
if rguard then {
}
DPC
writedpc
writedpc
Initial Values
rsrc1
copies the value of rsrc1 to the DPC (Destination Program Counter) processor register. Whenever
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
writedpc r30
IF r20 writedpc r31
IF r21 writedpc r31
Operation
PRELIMINARY SPECIFICATION
DPC
no change, since guard is false
DPC
PNX1300/01/02/11 DSPCPU Operations
0xbeebee
0xabba
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
readdpc writespc ijmpf
writedpc
Result
ijmpi ijmpt
ATTRIBUTES
SEE ALSO
writedpc
) coincide, the
fcomp
160
No
—
1
1
3
A-206
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