PNX1311EH/G,557 NXP Semiconductors, PNX1311EH/G,557 Datasheet - Page 487

IC MEDIA PROC 166MHZ 292-HBGA

PNX1311EH/G,557

Manufacturer Part Number
PNX1311EH/G,557
Description
IC MEDIA PROC 166MHZ 292-HBGA
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PNX1311EH/G,557

Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
48K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
169
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
292-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Other names
568-1295
935277721557
PNX1311EH/G
PNX1300/01/02/11 Data Book
uld16d
SYNTAX
FUNCTION
DESCRIPTION
32 bits, and writes the result in rdest. The d value is an opcode modifier, must be in the range –128 and 126 inclusive,
and must be a multiple of 2. If the memory address computed by rsrc1 + d is not a multiple of 2, the result of
is undefined but no exception will be raised. This load operation is performed as little-endian or big-endian depending
on the current setting of the bytesex bit in the PCSW.
defined only for 32-bit loads and stores.
modification of the destination register and the occurrence of side effects. If the LSB of rguard is 1, rdest is written and
the data cache status bits are updated if the addressed locations are cacheable. if the LSB of rguard is 0, rdest is not
changed and
EXAMPLES
A-189
r10 = 0xd00, [0xd02] = 0x22,
[0xd03] = 0x11
r30 = 0, r20 = 0xd04, [0xd00] = 0x84,
[0xd01] = 0x33
r40 = 1, r20 = 0xd04, [0xd00] = 0x84,
[0xd01] = 0x33
r50 = 0xd01
The
The result of an access by
The
[ IF rguard ] uld16d(d) rsrc1
if rguard then {
}
if PCSW.bytesex = LITTLE_ENDIAN then
else
temp<7:0>
temp<15:8>
rdest
uld16d
uld16d
bs
bs
Initial Values
1
0
zero_ext16to32(temp<15:0>)
uld16d
operation loads the 16-bit memory value from the address computed by rsrc1 + d, zero extends it to
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
mem[rsrc1 + d + (1
mem[rsrc1 + d + (0
PRELIMINARY SPECIFICATION
has no side effects whatever.
uld16d
bs)]
uld16d(2) r10
IF r30 uld16d(-4) r20
IF r40 uld16d(-4) r20
uld16d(-4) r50
bs)]
to the MMIO address aperture is undefined; access to the MMIO aperture is
rdest
Operation
Unsigned 16-bit load with displacement
r60
r90
r70
r80
r60
no change, since guard is false
r80
r90 undefined (0xd01 +(–4) is not a multiple
of 2)
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
uld16 ild16 ild16d uld16r
0x00002211
0x00008433
ild16r uld16x ild16x
Philips Semiconductors
ATTRIBUTES
SEE ALSO
Result
–128..126 by 2
dmem
7 bits
197
4, 5
uld16d
1
3

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