PNX1311EH/G,557 NXP Semiconductors, PNX1311EH/G,557 Datasheet - Page 405

• Manufacturer Part Number: PNX1311EH/G,557
• Description: IC MEDIA PROC 166MHZ 292-HBGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1311EH/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Ram Size: 48K x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 169
• Voltage - Supply: 2.375 V ~ 2.625 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 292-HBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Other names: 568-1295; 935277721557; PNX1311EH/G

PNX1300/01/02/11 Data Book
ild16x
SYNTAX
FUNCTION
DESCRIPTION
it to 32 bits, and stores the result in rdest. If the memory address computed by r src1 + 2 rsrc2 is not a multiple of 2,
the result of
big-endian depending on the current setting of the bytesex bit in the PCSW.
defined only for 32-bit loads and stores.
modification of the destination register and the occurrence of side effects. If the LSB of rguard is 1, rdest is written and
the data cache status bits are updated if the addressed locations are cacheable. if the LSB of rguard is 0, rdest is not
changed and
EXAMPLES
A-107
r10 = 0xd00, r30 = 1, [0xd02] = 0x22,
[0xd03] = 0x11
r50 = 0, r40 = 0xd04, r20 = 0xfffffffe,
[0xd00] = 0x84, [0xd01] = 0x33
r60 = 1, r40 = 0xd04, r20 = 0xfffffffe,
[0xd00] = 0x84, [0xd01] = 0x33
r70 = 0xd01, r30 = 1
The
The result of an access by
The
[ IF rguard ] ild16x r src1 rsrc2
if rguard then {
}
if PCSW.bytesex = LITTLE_ENDIAN then
else
temp<7:0>
temp<15:8>
rdest
ild16x
ild16x
bs
bs
Initial Values
1
0
sign_ext16to32(temp<15:0>)
ild16x
ild16x
operation loads the 16-bit memory value from the address computed by rsrc1 + 2 rsrc2, sign extends
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
mem[(rsrc1 + (2
mem[(rsrc1 + (2
is undefined but no exception will be raised. This load operation is performed as little-endian or
PRELIMINARY SPECIFICATION
has no side effects whatever.
ild16x
rsrc2) + (1
rsrc2) + (0
ild16x r10 r30
IF r50 ild16x r40 r20
IF r60 ild16x r40 r20
ild16x r70 r30
to the MMIO address aperture is undefined; access to the MMIO aperture is
bs)]
bs)]
Operation
rdest
Signed 16-bit load with scaled index
r100
r110
r80
r90
r100
no change, since guard is false
r90
r110 undefined, since 0xd01 + 2 1 is not a
multiple of 2
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
ild16 uld16 ild16d uld16d
0xffff8433
0x00002211
ild16r uld16r uld16x
Philips Semiconductors
ATTRIBUTES
SEE ALSO
Result
dmem
196
4, 5
No
—
2
3