PNX1311EH/G,557 NXP Semiconductors, PNX1311EH/G,557 Datasheet - Page 456
PNX1311EH/G,557
Manufacturer Part Number
PNX1311EH/G,557
Description
IC MEDIA PROC 166MHZ 292-HBGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1300EHG557.pdf
(549 pages)
Specifications of PNX1311EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
48K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
169
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
292-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Other names
568-1295
935277721557
PNX1311EH/G
935277721557
PNX1311EH/G
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Philips Semiconductors
Rotate left
SYNTAX
FUNCTION
DESCRIPTION
specify an unsigned rotate amount, and rdest is set to rsrc1 rotated left by this amount. The most-significant n bits of
rsrc1, where n is the rotate amount, appear as the least-significant n bits in rdest.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is unchanged.
EXAMPLES
r60 = 0x20, r30 = 3
r10 = 0, r60 = 0x20, r30 = 3
r20 = 1, r60 = 0x20, r30 = 3
r70 = 0xfffffffc, r40 = 2
r80 = 0xe, r50 = 0xfffffffe
As shown below, the
The
[ IF rguard ] rol rsrc1 rsrc2
if rguard then {
}
rsrc1
n
rdest<31:n>
rdest<n–1:0>
31
rol
rsrc2<4:0>
Intermediate result
Initial Values
(example: n = 9)
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
rsrc1<31–n:0>
rsrc1<31:32–n>
31
rol
operation takes two arguments, rsrc1 and rsrc2. The least-significant five bits of rsrc2
rol r60 r30
IF r10 rol r60 r30
IF r20 rol r60 r30
rol r70 r40
rol r80 r50
rdest
23
31
32 bits from rsrc1
Operation
rdest
0
r90
r120
r125
Left rotator
r100
r110
PRELIMINARY SPECIFICATION
rsrc2
31
0
9
31
r90
no change, since guard is false
r110
r120
r125
PNX1300/01/02/11 DSPCPU Operations
0x100
0x100
0xfffffff3
0x80000003 (r50 is effectively equal to 0x1e)
23
0
roli asr asri lsl lsli lsr
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
32 bits from rsrc1
Five LSBs of rsrc2
Result
ATTRIBUTES
SEE ALSO
lsri
4
n
shifter
1, 2
No
97
—
0
2
1
A-158
rol
0
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