PNX1311EH/G,557 NXP Semiconductors, PNX1311EH/G,557 Datasheet - Page 474
PNX1311EH/G,557
Manufacturer Part Number
PNX1311EH/G,557
Description
IC MEDIA PROC 166MHZ 292-HBGA
Manufacturer
NXP Semiconductors
Datasheet
1.PNX1300EHG557.pdf
(549 pages)
Specifications of PNX1311EH/G,557
Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Ram Size
48K x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
169
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
292-HBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Other names
568-1295
935277721557
PNX1311EH/G
935277721557
PNX1311EH/G
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Philips Semiconductors
IEEE status flags from convert floating-point to
unsigned integer using PCSW rounding mode
SYNTAX
FUNCTION
DESCRIPTION
precision IEEE floating-point value in rsrc1 to an unsigned integer, and an integer bit vector representing the
computed exception flags is written into rdest. The bit vector stored in rdest has the same format as the IEEE
exception bits in the PCSW. The exception flags in PCSW are left unchanged by this operation. Rounding is according
to the IEEE rounding mode bits in PCSW. If an argument is denormalized, zero is substituted before computing the
conversion, and the IFZ bit in the result is set.
controls the modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not
changed.
EXAMPLES
r30 = 0x40400000 (3.0)
r35 = 0x40247ae1 (2.57)
r10 = 0,
r40 = 0xff4fffff (–3.402823466e+38)
r20 = 1,
r40 = 0xff4fffff (–3.402823466e+38)
r45 = 0x7f800000 (+INF))
r50 = 0xbfc147ae (-1.51)
r60 = 0x00400000 (5.877471754e-39)
r70 = 0xffffffff (QNaN)
r80 = 0xffbfffff (SNaN)
The
The
[ IF rguard ] ufixieeeflags rsrc1
if rguard then
rdest
ufixieeeflags
ufixieeeflags
31
0
Initial Values
ieee_flags((unsigned long) ((float)rsrc1))
operation computes the IEEE exceptions that would result from converting the single-
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB
ufixieeeflags r30
ufixieeeflags r35
IF r10 ufixieeeflags r40
IF r20 ufixieeeflags r40
ufixieeeflags r45
ufixieeeflags r50
ufixieeeflags r60
ufixieeeflags r70
ufixieeeflags r80
rdest
Operation
PRELIMINARY SPECIFICATION
7
0
r100
r102
r112
r115
r117
r120
r122
OFZ
6
PNX1300/01/02/11 DSPCPU Operations
IFZ
5
r105
r110
INV
4
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
r100
r102
no change, since guard is false
r110
r112
r115
r117
r120
r122
ifixrzflags ufixrzflags
ufixieee ifixieeeflags
OVF
3
0
0x02 (INX)
0x10 (INV)
0x10 (INV)
0x10 (INV)
0x20 (IFZ)
0x10 (INV)
0x10 (INV)
ufixieeeflags
UNF
ATTRIBUTES
2
SEE ALSO
Result
INX
1
DBZ
0
124
1, 4
falu
No
—
1
3
A-176
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