PNX1311EH/G,557 NXP Semiconductors, PNX1311EH/G,557 Datasheet - Page 431

• Manufacturer Part Number: PNX1311EH/G,557
• Description: IC MEDIA PROC 166MHZ 292-HBGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1311EH/G,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Ram Size: 48K x 8
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 169
• Voltage - Supply: 2.375 V ~ 2.625 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 292-HBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Other names: 568-1295; 935277721557; PNX1311EH/G

PNX1300/01/02/11 Data Book
lsl
SYNTAX
FUNCTION
DESCRIPTION
arguments. (Note: pseudo operations cannot be used in assembly source files.)
and rdest is set to rsrc1 logically shifted left by this amount. If the rsrc2<31:5> value is not zero, then take this as a shift
by 32 or more bits. Zeros are shifted into the LSBs of rdest while the MSBs shifted out of rsrc1 are lost.
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is unchanged.
EXAMPLES
A-133
r60 = 0x20, r30 = 3
r10 = 0, r60 = 0x20, r30 = 3
r20 = 1, r60 = 0x20, r30 = 3
r70 = 0xfffffffc, r40 = 2
r80 = 0xe, r50 = 0xfffffffe
r30 = 0x7008000f, r45 = 0x20
r30 = 0x8008000f, r45 = 0x80000000
r30 = 0x8008000f, r45 = 0x23
The
As shown below, the
The
[ IF rguard ] lsl rsrc1 rsrc2
if rguard then {
}
rsrc1
n
rdest<31:n>
rdest<n–1:0>
if rsrc2<31:5> != 0 {
}
rdest <- 0
lsl
lsl
31
rsrc2<4:0>
Initial Values
operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
operation is a pseudo operation that is transformed by the scheduler into an
Intermediate result
rsrc1<31–n:0>
0
(example: n = 3)
lsl
PRELIMINARY SPECIFICATION
operation takes two arguments, rsrc1 and rsrc2. Rsrc2 specify an unsigned shift amount,
rdest
lsl r60 r30
IF r10 lsl r60 r30
IF r20 lsl r60 r30
lsl r70 r40
lsl r80 r50
lsl r30 r45
lsl r30 r45
lsl r30 r45
31
rdest
32 bits from rsrc1
Operation
0
Left shifter
r90
r120
r125
r100
r100
r100
rsrc2
r100
r110
31
r90
no change, since guard is false
r110
r120
r125
r100
r100
r100
3
0
0
0
0
0x100
0
0
0x100
0xfffffff0
0x00000000 (shift by more than 32))
0x00000000
0x00000000
0x00000000
0
asl asli asr asri lsli lsr
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
Philips Semiconductors
lsri rol roli
Logical shift left
ATTRIBUTES
Result
SEE ALSO
rsrc2
pseudo-op for asl
asl
with the same
shifter
1, 2
No
19
0
—
2
1