LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 164

• Manufacturer Part Number: LPC1114FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1114FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1114
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
Table 165. LPC1110/11/12 pin description table (SO20 and TSSOP20 package with I
[1]
[2]
[3]
[4]
[5]
[6]
10.3 Pin configuration (LPC1112)
UM10398
User manual
Symbol
V
XTALIN
XTALOUT
V
Fig 24. Pin configuration TSSOP20 package with V
DD
SS
Pin state at reset for default function: I = Input; O = Output; PU = internal pull-up enabled (pins pulled up to full V
no pull-up/down enabled.
RESET functionality is not available in Deep power-down mode. Use the WAKEUP pin to reset the chip and wake up from Deep
power-down mode. An external pull-up resistor is required on this pin for the Deep power-down mode.
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors and configurable hysteresis.
I
5 V tolerant pad providing digital I/O functions with configurable pull-up/pull-down resistors, configurable hysteresis, and analog input.
When configured as a ADC input, digital section of the pad is disabled and the pin is not 5 V tolerant .
When the system oscillator is not used, connect XTALIN and XTALOUT as follows: XTALIN can be left floating or can be grounded
(grounding is preferred to reduce susceptibility to noise). XTALOUT should be left floating.
2
C-bus pads compliant with the I
SWCLK/PIO0_10/SCK0/CT16B0_MAT2
SWDIO/PIO1_3/AD4/CT32B1_MAT2
15
14
13
16
R/PIO0_11/AD0/CT32B0_MAT3
PIO0_8/MISO0/CT16B0_MAT0
PIO0_9/MOSI0/CT16B0_MAT1
R/PIO1_0/AD1/CT32B1_CAP0
R/PIO1_1/AD2/CT32B1_MAT0
R/PIO1_2/AD3/CT32B1_MAT1
[6]
[6]
Start
logic
input
-
-
-
-
2
C-bus specification for I
Chapter 10: LPC111x Pin configuration (LPC1100L series, TSSOP, DIP,
Type Reset
I
O
All information provided in this document is subject to legal disclaimers.
V
V
DDA
SSA
Rev. 12 — 24 September 2012
state
[1]
-
-
-
-
10
1
2
3
4
5
6
7
8
9
LPC1112FDH20/102
2
Description
3.3 V supply voltage to the internal regulator, the external rail, and
the ADC. Also used as the ADC reference voltage.
Input to the oscillator circuit and internal clock generator circuits.
Input voltage must not exceed 1.8 V.
Output from the oscillator amplifier.
Ground.
C standard mode and I
DDA
and V
SSA
002aag597
pins
20
19
18
17
16
15
14
13
12
11
2
C Fast-mode Plus.
PIO0_3
PIO0_2/SSEL0/CT16B0_CAP0
PIO0_1/CLKOUT/CT32B0_MAT2
RESET/PIO0_0
V
V
XTALIN
XTALOUT
PIO1_7/TXD/CT32B0_MAT1
PIO1_6/RXD/CT32B0_MAT0
SS
DD
2
C-bus pins)
UM10398
…continued
DD
© NXP B.V. 2012. All rights reserved.
level ); IA = inactive,
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