LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 68

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LPC1114FHN33/203,5

Manufacturer Part Number
LPC1114FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1114FHN33/203,5

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1114
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
NXP Semiconductors
UM10398
User manual
7.3.2 Pin mode
7.3.3 Hysteresis
7.3.4 A/D-mode
7.3.5 I
The MODE bits in the IOCON register allow the selection of on-chip pull-up or pull-down
resistors for each pin or select the repeater mode.
The possible on-chip resistor configurations are pull-up enabled, pull-down enabled, or no
pull-up/pull-down. The default value is pull-up enabled. See
details.
The repeater mode enables the pull-up resistor if the pin is at a logic HIGH and enables
the pull-down resistor if the pin is at a logic LOW. This causes the pin to retain its last
known state if it is configured as an input and is not driven externally. The state retention is
not applicable to the Deep power-down mode. Repeater mode may typically be used to
prevent a pin from floating (and potentially using significant power if it floats to an
indeterminate state) if it is temporarily not driven.
The input buffer for digital functions can be configured with hysteresis or as plain buffer
through the IOCON registers (see the LPC111x and LPC11Cx data sheets for details).
If the external pad supply voltage V
can be enabled or disabled. If V
to use the pin in input mode.
In A/D-mode, the digital receiver is disconnected to obtain an accurate input voltage for
analog-to-digital conversions. This mode can be selected in those IOCON registers that
control pins with an analog function. If A/D mode is selected, Hysteresis and Pin mode
settings have no effect.
For pins without analog functions, the A/D-mode setting has no effect.
If the I
and IOCON_PIO0_5
I
Remark: Either Standard mode/Fast-mode I
selected if the pin is used as GPIO pin.
2
2
C-modes:
C mode
Standard mode/Fast-mode I
output according to the I
Fast-mode Plus with input glitch filter (this includes an open-drain output according to
the I
Standard open-drain I/O functionality without input filter.
2
C function is selected by the FUNC bits of registers IOCON_PIO0_4
2
C-bus specification). In this mode, the pins function as high-current sinks.
All information provided in this document is subject to legal disclaimers.
Chapter 7: LPC1100/LPC1100C/LPC1100L series: I/O configuration
Rev. 12 — 24 September 2012
(Table
68), then the I
2
C-bus specification).
DD
2
C with input glitch filter (this includes an open-drain
is below 2.5 V, the hysteresis buffer must be disabled
DD
is between 2.5 V and 3.6 V, the hysteresis buffer
2
C-bus pins can be configured for different
2
C or Standard I/O functionality should be
Section 7.1
UM10398
© NXP B.V. 2012. All rights reserved.
for part specific
(Table
68 of 538
67)

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