LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 407

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LPC1114FHN33/203,5

Manufacturer Part Number
LPC1114FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1114FHN33/203,5

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1114
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
NXP Semiconductors
Table 368. LPC111x/LPC11Cx flash configurations
26.2 Features
26.3 General description
UM10398
User manual
Type number
LPC1114FHN33/302
LPC1114FHN33/303
LPC1114FHN33/333
LPC1114FHI33/302
LPC1114FHI33/303
LPC1114FBD48/301
LPC1114FBD48/302
LPC1114FBD48/303
LPC1114FBD48/323
LPC1114FBD48/333
LPC1115FBD48/303
LPC11D14
LPC11C12/C22
LPC11C14/C24
26.3.1 Bootloader
Remark: In addition to the ISP and IAP commands, a register in the flash controller block
can be accessed to configure flash memory access times, see
The bootloader controls initial operation after reset and also provides the means to
accomplish programming of the flash memory via UART or C_CAN. This could be initial
programming of a blank device, erasure and re-programming of a previously programmed
device, or programming of the flash memory by the application program in a running
system.
In-System Programming: In-System programming (ISP) is programming or
reprogramming the on-chip flash memory, using the bootloader software and UART
serial port or the C_CAN interface. This can be done when the part resides in the
end-user board.
In-Application Programming: In-Application (IAP) programming is performing erase
and write operation on the on-chip flash memory, as directed by the end-user
application code.
Flash access times can be configured through a register in the flash controller block.
bytes is 1 ms ± 5%.
Erase time for one sector is 100 ms ± 5%. Programming time for one block of 256
Flash
32 kB
32 kB
56 kB
32 kB
32 kB
32 kB
32 kB
32 kB
48 kB
56 kB
64 kB
32 kB
16 kB
32 kB
All information provided in this document is subject to legal disclaimers.
Table 370
Table 370
Table 369
Table 370
Table 369
Table 369
Table 370
Table 370
Table 370
Table 370
Table 369
Configuration
Table 369
Table 369
Table 369
Rev. 12 — 24 September 2012
Chapter 26: LPC111x/LPC11Cxx Flash programming firmware
Page erase IAP
command supported
no
yes
yes
no
yes
no
no
yes
yes
yes
yes
no
no
no
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
ISP via UART ISP via C_CAN
Section
UM10398
© NXP B.V. 2012. All rights reserved.
26.9.
no
no
no
no
no
no
no
no
no
no
no
no
yes
yes
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