LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 389

• Manufacturer Part Number: LPC1114FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1114FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1114
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
Fig 85. Early Watchdog Feed with Windowed Mode Enabled
22.7.6 Watchdog Timer Window register
22.7.7 Watchdog timing examples
WDCLK / 4
Conditions :
WINDOW
WARNINT
TC
Early Feed
Watchdog
Watchdog
Counter
Table 348: Watchdog Timer Warning Interrupt register (WDWARNINT - 0x4000 4014) bit
The WDWINDOW register determines the highest WDTV value allowed when a watchdog
feed is performed. If a feed valid sequence completes prior to WDTV reaching the value in
WDWINDOW, a watchdog event will occur.
WDWINDOW resets to the maximum possible WDTV value, so windowing is not in effect.
Table 349: Watchdog Timer Window register (WDWINDOW - 0x4000 4018) bit description
The following figures illustrate several aspects of Watchdog Timer operation.
Bit
9:0
31:10
Bit
23:0
31:24
Reset
Event
Symbol
WARNINT
-
Symbol
WINDOW
-
= 0x1200
= 0x3FF
= 0x2000
125A
description
All information provided in this document is subject to legal disclaimers.
1259
Chapter 22: LPC111x/LPC11Cxx Windowed WatchDog Timer (WDT)
Description
Watchdog warning interrupt compare value.
Reserved. Read value is undefined, only zero should be
written.
Description
Watchdog window value.
Reserved. Read value is undefined, only zero should be
written.
Rev. 12 — 24 September 2012
1258
1257
UM10398
© NXP B.V. 2012. All rights reserved.
Reset value
0
-
Reset value
0xFF FFFF
-
389 of 538