LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 253

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LPC1114FHN33/203,5

Manufacturer Part Number
LPC1114FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1114FHN33/203,5

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1114
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
NXP Semiconductors
UM10398
User manual
Fig 53. Format and states in the Master Transmitter mode
successful
transmission
to a Slave
Receiver
next transfer
started with a
Repeated Start
condition
Not
Acknowledge
received after
the Slave
address
Not
Acknowledge
received after a
Data byte
arbitration lost
in Slave
address or
Data byte
arbitration lost
and
addressed as
Slave
DATA
n
08H
from Master to Slave
from Slave to Master
S
any number of data bytes and their associated Acknowledge bits
this number (contained in I2STA) corresponds to a defined state of the
I
2
C bus
SLA
All information provided in this document is subject to legal disclaimers.
W
MT
Rev. 12 — 24 September 2012
A OR A
18H
20H
68H 78H B0H
A
A
A
38H
P
other Master
continues
other Master
continues
Chapter 15: LPC111x/LPC11Cxx I2C-bus controller
DATA
states in Slave mode
to corresponding
A OR A
28H
30H
A
A
38H
10H
P
S
P
other Master
continues
SLA
to Master
receive
UM10398
mode,
= MR
entry
© NXP B.V. 2012. All rights reserved.
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R
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