LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 512

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LPC1114FHN33/203,5

Manufacturer Part Number
LPC1114FHN33/203,5
Description
ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1114FHN33/203,5

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1114
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Operating Temperature Range
- 65 C to + 150 C
Package / Case
HVQFN-33
Mounting Style
SMD/SMT
Factory Pack Quantity
260
NXP Semiconductors
UM10398
User manual
Table 462. Cortex M0- instruction summary
[1]
[2]
[3]
[4]
[5]
[6]
Operation
Hint
Barriers
N is the number of elements.
N is the number of elements in the stack-pop list including PC and assumes load or store
does not generate a HardFault exception.
3 if taken, 1 if not taken.
Cycle count depends on core and debug configuration.
Excludes time spend waiting for an interrupt or event.
Executes as NOP.
Chapter 28: LPC111x/LPC11Cxx Appendix: ARM Cortex-M0 reference
All information provided in this document is subject to legal disclaimers.
Description
Send event
Wait for event
Wait for interrupt
Yield
No operation
Instruction synchronization
Data memory
Data synchronization
Rev. 12 — 24 September 2012
Assembler
SEV
WFE
WFI
YIELD
NOP
ISB
DMB
DSB
[6]
UM10398
© NXP B.V. 2012. All rights reserved.
Cycles
1
2
2
1
1
4
4
4
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[5]
[5]

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