LPC1114FHN33/203,5 NXP Semiconductors, LPC1114FHN33/203,5 Datasheet - Page 293

• Manufacturer Part Number: LPC1114FHN33/203,5
• Description: ARM Microcontrollers - MCU Cortex-M0 32 kB Fl 8 kB SRAM
• Manufacturer: NXP Semiconductors

Specifications of LPC1114FHN33/203,5

• Rohs: yes
• Core: ARM Cortex M0
• Processor Series: LPC1114
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.8 V to 3.6 V
• Operating Temperature Range: - 65 C to + 150 C
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 260

NXP Semiconductors
UM10398
User manual
16.6.2.4.7 CAN message interface data A2 registers
16.6.2.4.8 CAN message interface data B1 registers
16.6.2.4.9 CAN message interface data B2 registers
16.6.3 Message handler registers
Remark: Byte DATA0 is the first data byte shifted into the shift register of the CAN Core
during a reception, byte DATA7 is the last. When the Message Handler stores a Data
Frame, it will write all the eight data bytes into a Message Object. If the Data Length Code
is less than 8, the remaining bytes of the Message Object will be overwritten by non
specified values.
Table 262. CAN message interface data A1 registers (CANIF1_DA1, address 0x4005 003C
Table 263. CAN message interface data A2 registers (CANIF1_DA2, address 0x4005 0040
Table 264. CAN message interface data B1 registers (CANIF1_DB1, address 0x4005 0044
Table 265. CAN message interface data B2 registers (CANIF1_DB2, address 0x4005 0048
All Message Handler registers are read-only. Their contents (TXRQST, NEWDAT,
INTPND, and MSGVAL bits of each Message Object and the Interrupt Identifier) is status
information provided by the Message Handler FSM.
Bit
7:0
15:8
31:16
Bit
7:0
15:8
31:16
Bit
7:0
15:8
31:16
Bit
7:0
15:8
31:16
Symbol Description
DATA0
DATA1
-
Symbol Description
DATA2
DATA3
-
Symbol Description
DATA4
DATA5
-
Symbol Description
DATA6
DATA7
-
and CANIF2_DA1, address 0x4005 009C) bit description
and CANIF2_DA2, address 0x4005 00A0) bit description
and CANIF2_DB1, address 0x4005 00A4) bit description
and CANIF2_DB2, address 0x4005 00A8) bit description
All information provided in this document is subject to legal disclaimers.
Data byte 0
Data byte 1
Reserved
Data byte 2
Data byte 3
Reserved
Data byte 4
Data byte 5
Reserved
Data byte 6
Data byte 7
Reserved
Rev. 12 — 24 September 2012
Chapter 16: LPC111x/LPC11Cxx C_CAN controller
Reset value Access
0x00
0x00
-
Reset value Access
0x00
0x00
-
Reset value Access
0x00
0x00
-
Reset value Access
0x00
0x00
-
UM10398
© NXP B.V. 2012. All rights reserved.
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