AT91CAP7E-NA-ZJ Atmel, AT91CAP7E-NA-ZJ Datasheet - Page 100

• Manufacturer Part Number: AT91CAP7E-NA-ZJ
• Description: MCU CAP7 FPGA 225LFBGA
• Manufacturer: Atmel
• Series: CAP™r

Specifications of AT91CAP7E-NA-ZJ

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, FPGA, IrDA, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: ROM
• Ram Size: 160K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-LFBGA
• Processor Series: AT91Mx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

18.6.3
Register Name:
Access Type:
• WKMODE0: Wake-up Mode 0
Table 1.
• CPTWK0: Counter on Wake-up 0
Defines the number of 16 Slow Clock cycles, the level detection on the corresponding input pin shall last before the wake-
up event occurs. Because of the internal synchronization of WKUP0, the
(CPTWK x 16 + 1) Slow Clock cycles after the event on WKUP.
• RTTWKEN: Real-time Timer Wake-up Enable
0 = The RTT Alarm signal has no effect on the Shutdown Controller.
1 = The RTT Alarm signal forces the de-assertion of the
100
31
23
15
–
–
–
7
0
0
1
1
WKMODE[1:0]
AT91CAP7E
Shutdown Mode Register
30
22
14
–
–
–
6
SHDW_MR
0
1
0
1
CPTWK0
Read/Write
Wake-up Input Transition Selection
None. No detection is performed on the wake-up input
Low to high level
High to low level
Both levels change
29
21
13
–
–
–
5
28
20
12
–
–
–
4
SHDN
pin.
27
19
11
–
–
–
3
–
SHDN
pin is released
26
18
10
–
–
–
2
–
25
17
–
–
9
–
1
WKMODE0
8549A–CAP–10/08
RTTWKEN
24
16
–
8
–
0