AT91CAP7E-NA-ZJ Atmel, AT91CAP7E-NA-ZJ Datasheet - Page 39

• Manufacturer Part Number: AT91CAP7E-NA-ZJ
• Description: MCU CAP7 FPGA 225LFBGA
• Manufacturer: Atmel
• Series: CAP™r

Specifications of AT91CAP7E-NA-ZJ

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 80MHz
• Connectivity: EBI/EMI, FPGA, IrDA, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: ROM
• Ram Size: 160K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-LFBGA
• Processor Series: AT91Mx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.5.3
10.5.4
10.5.5
8549A–CAP–10/08
Timer Counter
USB Device Port
Analog to Digital Converter
• Three 16-bit Timer Counter Channels
• Wide range of functions including:
• Each channel is user-configurable and contains:
• Two global registers that act on all three TC Channels
• USB V2.0 full-speed compliant, 12 MBits per second
• Embedded USB V2.0 full-speed transceiver
• Embedded 2,432-byte dual-port RAM for endpoints
• Suspend/Resume logic
• Ping-pong mode (two memory banks) for isochronous and bulk endpoints
• Six general-purpose endpoints
• 10-bit Successive Approximation Register (SAR) ADC based on thermometric-resistive
• Up to 440 kSamples/sec.
• Up to 8 independent analog input channels
• Low active power: < 2 mW
• Low power stand-by mode
• External voltage reference of 2.6V to analog supply for better accuracy
• + 2LSB Integral Non-Linearity (INL), + 0.9 LSB Differential Non-Linearity (DNL)
• Individual enable and disable of each channel
• Multiple trigger sources:
• Sleep Mode and conversion sequencer
– Frequency Measurement
– Event Counting
– Interval Measurement
– Pulse Generation
– Delay Timing
– Pulse Width Modulation
– Up/down Capabilities
– Three external clock inputs
– Five internal clock inputs
– Two multi-purpose input/output signals
– Endpoint 0 and 3: 64 bytes, no ping-pong mode
– Endpoint 1 and 2: 64 bytes, ping-pong mode
– Endpoint 4 and 5: 512 bytes, ping-pong mode
– Hardware or software trigger
– External trigger pin
– Automatic wakeup on trigger and back to sleep mode after conversions of all
enabled channels
AT91CAP7E
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