C8051F930-GQ Silicon Laboratories Inc, C8051F930-GQ Datasheet - Page 147

• Manufacturer Part Number: C8051F930-GQ
• Description: IC 8051 MCU 64K FLASH 32-LQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F9xxr

Specifications of C8051F930-GQ

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 32-LQFP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 24
• Ram Size: 4.25K x 8
• Voltage - Supply (vcc/vdd): 0.9 V ~ 3.6 V
• Data Converters: A/D 23x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F9x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 4.25 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 4
• Operating Supply Voltage: 0.9 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F930DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 23-ch x 10-bit
• No. Of I/o's: 24
• Ram Memory Size: 4KB
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-1478 - PLATFORM PROG TOOLSTCK F920,F930336-1477 - PLATFORM PROG TOOLSTCK F920,F930336-1473 - KIT DEV C8051F920,F921,F930,F931336-1472 - BOARD TARGET/PROTO W/C8051F930
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1466

An additional 1024-byte scratchpad is available for non-volatile data storage. It is accessible at addresses
0x0000 to 0x03FF when SFLE is set to 1. The scratchpad area cannot be used for code execution.
13.3. Security Options
The CIP-51 provides security options to protect the Flash memory from inadvertent modification by soft-
ware as well as to prevent the viewing of proprietary program code and constants. The Program Store
Write Enable (bit PSWE in register PSCTL) and the Program Store Erase Enable (bit PSEE in register
PSCTL) bits protect the Flash memory from accidental modification by software. PSWE must be explicitly
set to 1 before software can modify the Flash memory; both PSWE and PSEE must be set to 1 before soft-
ware can erase Flash memory. Additional security features prevent proprietary program code and data
constants from being read or altered across the C2 interface.
A Security Lock Byte located at the last byte of Flash user space offers protection of the Flash program
memory from access (reads, writes, or erases) by unprotected code or the C2 interface. The Flash security
mechanism allows the user to lock n 1024-byte Flash pages, starting at page 0 (addresses 0x0000 to
0x03FF), where n is the 1s complement number represented by the Security Lock Byte. The page con-
taining the Flash Security Lock Byte is unlocked when no other Flash pages are locked (all bits of
the Lock Byte are 1) and locked when any other Flash pages are locked (any bit of the Lock Byte is
0). See the C8051F930 example below.
0x0000
0xFBFF
0xFBFE
0xFFFF
0xFC00
0xF800
Flash pages locked:
Security Lock Byte:
ones Complement:
Addresses locked:
64KB Flash Device
Unlocked Flash Pages
Lock Byte Page
(SFLE = 0)
Lock Byte
Reserved
Figure 13.1. Flash Program Memory Map
Locked when
set according
security lock
Flash pages
Access limit
to the Flash
are locked
any other
byte
0x0000 to 0x07FF (first two Flash pages) and
3 (First two Flash pages + Lock Byte Page)
Unlocked Flash Pages
32KB Flash Device
Lock Byte Page
0xF800 to 0xFBFF (Lock Byte Page)
Address Space
Rev. 1.1
Unpopulated
(SFLE = 0)
(Reserved)
Lock Byte
C8051F93x-C8051F92x
00000010b
11111101b
0xFFFF
0x8000
0x7FFF
0x7FFE
0x7C00
0x0000
64/32KB Flash Device
Scratchpad Area
(Data Only)
(SFLE = 1)
0x0000
0x03FF
organized in
1024-byte
memory
pages
Flash
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