C8051F930-GQ Silicon Laboratories Inc, C8051F930-GQ Datasheet - Page 90

IC 8051 MCU 64K FLASH 32-LQFP

C8051F930-GQ

Manufacturer Part Number
C8051F930-GQ
Description
IC 8051 MCU 64K FLASH 32-LQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F9xxr
Datasheets

Specifications of C8051F930-GQ

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
32-LQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
24
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
0.9 V ~ 3.6 V
Data Converters
A/D 23x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F9x
Core
8051
Data Bus Width
8 bit
Data Ram Size
4.25 KB
Interface Type
I2C/SMBus/SPI/UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
24
Number Of Timers
4
Operating Supply Voltage
0.9 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F930DK
Minimum Operating Temperature
- 40 C
On-chip Adc
23-ch x 10-bit
No. Of I/o's
24
Ram Memory Size
4KB
Cpu Speed
25MHz
No. Of Timers
4
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1478 - PLATFORM PROG TOOLSTCK F920,F930336-1477 - PLATFORM PROG TOOLSTCK F920,F930336-1473 - KIT DEV C8051F920,F921,F930,F931336-1472 - BOARD TARGET/PROTO W/C8051F930
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1466

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F930-GQ
Manufacturer:
SILICON
Quantity:
3 500
Part Number:
C8051F930-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F930-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
Part Number:
C8051F930-GQR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
C8051F93x-C8051F92x
7.
C8051F93x-C8051F92x devices include two on-chip programmable voltage comparators: Comparator 0
(CPT0) is shown in Figure 7.1; Comparator 1 (CPT1) is shown in Figure 7.2. The two comparators operate
identically, but may differ in their ability to be used as reset or wake-up sources. See the Reset Sources
chapter and the Power Management chapter for details on reset sources and low power mode wake-up
sources, respectively.
The Comparator offers programmable response time and hysteresis, an analog input multiplexer, and two
outputs that are optionally available at the Port pins: a synchronous “latched” output (CP0, CP1), or an
asynchronous “raw” output (CP0A, CP1A). The asynchronous CP0A signal is available even when the
system clock is not active. This allows the Comparator to operate and generate an output when the device
is in some low power modes.
7.1.
Each Comparator performs an analog comparison of the voltage levels at its positive (CP0+ or CP1+) and
negative (CP0- or CP1-) input. Both comparators support multiple port pin inputs multiplexed to their posi-
tive and negative comparator inputs using analog input multiplexers. The analog input multiplexers are
completely under software control and configured using SFR registers. See Section “7.6. Comparator0 and
Comparator1 Analog Multiplexers” on page 97 for details on how to select and configure Comparator
inputs.
Important Note About Comparator Inputs: The Port pins selected as Comparator inputs should be con-
figured as analog inputs and skipped by the Crossbar. See the Port I/O chapter for more details on how to
configure Port I/O pins as Analog Inputs. The Comparator may also be used to compare the logic level of
digital signals, however, Port I/O pins configured as digital inputs must be driven to a valid logic state
(HIGH or LOW) to avoid increased power consumption.
90
Comparators
Analog Input Multiplexer
Px.x
Px.x
Px.x
Px.x
Comparator Inputs
Figure 7.1. Comparator 0 Functional Block Diagram
CP0HYN1
CP0HYN0
CP0HYP1
CP0HYP0
CP0OUT
CP0RIF
CP0FIF
CP0EN
CP0 +
CP0 -
+
-
Rev. 1.1
VDD
GND
Decision
Reset
CPT0MD
Tree
(ASYNCHRONOUS)
(SYNCHRONIZER)
D
SET
CLR
Q
Q
D
SET
CLR
Q
Q
Rising-edge
CP0
Crossbar
Interrupt
Logic
Falling-edge
Interrupt
CP0
CP0A
CP0
CP0

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