DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 306

MCU 3V 16K 32-QFN

DF38602RFT10

Manufacturer Part Number
DF38602RFT10
Description
MCU 3V 16K 32-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H SLPr
Datasheet

Specifications of DF38602RFT10

Core Processor
H8/300H
Core Size
16-Bit
Speed
10MHz
Connectivity
I²C, IrDA, SCI, SSU
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F38602RFT10
HD64F38602RFT10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF38602RFT10V
Manufacturer:
Renesas Electronics America
Quantity:
135
Section 14 Serial Communication Interface 3 (SCI3, IrDA)
14.6.1
During transmission, the output signals from the SCI3 (UART frames) are converted to IR frames
using the IrDA interface (see figure 14.16).
For serial data of level 0, a high-level pulse having a width of 3/16 of the bit rate (1-bit interval) is
output (initial setting). The high-level pulse can be selected using the IrCKS2 to IrCKS0 bits in
IrCR.
According to the standard, the high-level pulse width is defined to be 1.41 µs at minimum and
(3/16 + 2.5%) × bit rate or (3/16 × bit rate) +1.08 µs at maximum. For example, when the
frequency of system clock φ is 10 MHz, being equal to or greater than 1.41 µs, the high-level pulse
width at minimum can be specified as 1.6 µs.
For serial data of level 1, no pulses are output.
Rev. 3.00 May 15, 2007 Page 272 of 516
REJ09B0152-0300
Transmission
Transmission
Bit
cycle
Start
bit
Start
bit
Figure 14.16 IrDA Transmission and Reception
0
0
1
1
0
0
UART frame
IR frame
1
1
0
0
Data
Data
0
0
Reception
1
1
Pulse width is 1.6 µs to
3/16 bit cycle
1
1
0
0
Stop
bit
Stop
bit
1
1

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