DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 535

• Manufacturer Part Number: DF38602RFT10
• Description: MCU 3V 16K 32-QFN
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300H SLPr

Specifications of DF38602RFT10

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 10MHz
• Connectivity: I²C, IrDA, SCI, SSU
• Peripherals: POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 32-QFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: HD64F38602RFT10; HD64F38602RFT10

Item
5.3.4 Direct Transition from Active
(Medium-Speed) Mode to
Subactive Mode
5.3.5 Direct Transition from
Subactive Mode to Active (High-
Speed) Mode
Page Revisions (See Manual for Details)
93
93
Added
When a SLEEP instruction is executed in active
(medium-speed) mode while the SSBY, LSON, and
TMA3 bits in SYSCR1 are set to 1 and the DTON bit in
SYSCR2 is set to 1, a transition is made to subactive
mode via watch mode.
The time from the start of SLEEP instruction execution
to the end of interrupt exception handling (the direct
transition time) is calculated by equation (4).
Added and modified
When a SLEEP instruction is executed in subactive
mode while the SSBY and TMA3 bits in SYSCR1 are
set to 1, the LSON bit in SYSCR1 is cleared to 0, the
MSON bit in SYSCR2 is cleared to 0, and the DTON bit
in SYSCR2 is set to 1, a transition is made directly to
active (high-speed) mode via watch mode after the
waiting time set in bits STS2 to STS0 in SYSCR1 has
elapsed.
The time from the start of SLEEP instruction execution
to the end of interrupt exception handling (the direct
transition time) is calculated by equation (5).
Direct transition time = {(Number of SLEEP instruction
execution states) + (Number of internal processing
states)} × (tsubcyc before transition) + (Wait time set in
bits STS2 to STS0) + (Number of interrupt exception
handling execution states) × (tcyc after transition)…..(5)
Example: When φosc/8 and φw/8 are selected as the
CPU operating clock before and after the transition,
respectively
Direct transition time = (2 + 1) × 8tosc + 14 × 8tw =
24tosc + 112tw
For the legend of symbols used above, refer to
section 21, Electrical Characteristics.
Example: When φw/8 is selected as the CPU
operating clock after the transition and wait time =
8192 states
Direct transition time = (2 + 1) × 8tw + (8192 + 14)
×1tosc = 24tw + 8206tosc
For the legend of symbols used above, refer to
section 21, Electrical Characteristics.
Rev. 3.00 May 15, 2007 Page 501 of 516
REJ09B0152-0300