DF38602RFT10 Renesas Electronics America, DF38602RFT10 Datasheet - Page 323

MCU 3V 16K 32-QFN

DF38602RFT10

Manufacturer Part Number
DF38602RFT10
Description
MCU 3V 16K 32-QFN
Manufacturer
Renesas Electronics America
Series
H8® H8/300H SLPr
Datasheet

Specifications of DF38602RFT10

Core Processor
H8/300H
Core Size
16-Bit
Speed
10MHz
Connectivity
I²C, IrDA, SCI, SSU
Peripherals
POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
32-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F38602RFT10
HD64F38602RFT10

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF38602RFT10V
Manufacturer:
Renesas Electronics America
Quantity:
135
15.3.3
SSMR is a register that selects MSB-first or LSB-first, clock polarity, clock phase, and transfer
clock rate.
Bit
7
6
5
4, 3
2
1
0
Bit Name
MLS
CPOS
CPHS
CKS2
CKS1
CKS0
SS Mode Register (SSMR)
Initial
Value
0
0
0
All 0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
MSB-First/LSB-First Select
Selects whether data transfer is performed in MSB-first
or LSB-first.
0: LSB-first
1: MSB-first
Clock Polarity Select
Selects the clock polarity of SSCK.
0: Idle state = high
1: Idle state = low
Clock Phase Select
Selects the clock phase of SSCK.
0: Data change at first edge
1: Data latch at first edge
Reserved
These bits are always read as 0.
Transfer clock rate select
Sets transfer clock rate (prescaler division ratio) when
the internal clock is selected.
The system clock (φ) is halted in subactive mode or
subsleep mode. Select φ
000: φ/256
001: φ/128
010: φ/64
011: φ/32
100: φ/16
101: φ/8
110: φ/4
111: φ
Section 15 Synchronous Serial Communication Unit (SSU)
SUB
/2
Rev. 3.00 May 15, 2007 Page 289 of 518
SUB
/2 in these modes.
REJ09B0152-0300

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