M30624FGNGP#D5 Renesas Electronics America, M30624FGNGP#D5 Datasheet - Page 122

• Manufacturer Part Number: M30624FGNGP#D5
• Description: IC M16C MCU FLASH 256K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30624FGNGP#D5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Serial I/O
Figure 1.17.8. Serial I/O-related registers (5)
UART2 special mode register
b7 b6 b5 b4 b3 b2 b1 b0
UART transmit/receive control register 2
b7
b6
0
b5
b4 b3
b2
b1
b0
Note 1: Nothing but “0” may be written.
Note 2: When not in I
Note: When using multiple pins to output the transfer clock, the following requirements must be met:
ABSCS
CLKMD0
CLKMD1
ACSE
SDDS
U0RRM
U1RRM
symbol
SSS
Nothing is assigned.
In an attempt to write to this bit, write “0”. The value, if read, turns out to be indeterminate.
symbol
LSYN
U0IRS
U1IRS
Reserved bit
ABC
BBS
IICM
Bit
Bit
bit = “0”, UART2 special mode register 3 (U2SMR3 at address 0375
digital delay setup bits) are initialized to “000”. Also, when SDDS = “0”, the U2SMR3 register cannot be
read or written to.
Symbol
U2SMR
Symbol
• UART1 internal/external clock select bit (bit 3 at address 03A8
UCON
I
Arbitration lost detecting
flag control bit
Transmit start condition
select bit
SDA digital delay select
bit (Note 2)
Bus busy flag
SCLL sync output
enable bit
Bus collision detect
sampling
clock select bit
Auto clear function
select bit of transmit
enable bit
UART0 transmit
interrupt cause select bit
UART1 transmit
interrupt cause select bit
UART0 continuous
receive mode enable bit
2
UART1 continuous
receive mode enable bit
CLK/CLKS select bit 0
CLK/CLKS select
bit 1 (Note)
C mode select bit
name
2
name
C mode, do not set this bit by writing a “1”. During normal mode, fix it to “0”. When this
Bit
Bit
Address
Address
0377
03B0
16
16
0 : Must always be “0”
1 : Digital delay output
0 : STOP condition detected
1 : START condition detected
Must always be “0”
Must always be “0”
Must always be “0”
(During clock synchronous
0 : Normal mode
1 : I
0 : Update per bit
1 : Update per byte
0 : Disabled
1 : Enabled
Must always be set to “0”
(During clock synchronous
0 :
1 : Transmission completed
0 :
1 : Transmission completed
0 : Continuous receive
1 : Continuous receive
0 : Continuous receive
1 : Continuous receive
Valid when bit 5 = “1”
0 : Clock output to CLK1
1 : Clock output to CLKS1
0 : Normal mode
1 : Transfer clock output
is selected
when not using I
Transmit buffer empty (Tl = 1)
Transmit buffer empty (Tl = 1)
(CLK output is CLK1 only)
from multiple pins
function selected
(TXEPT = 1)
(TXEPT = 1)
mode disabled
mode enable
2
mode disabled
mode enabled
C mode
serial I/O mode)
serial I/O mode)
When reset
When reset
X0000000
Function
Function
80
16
2
2
C mode
0 : Rising edge of transfer
1 : Underflow signal of timer A0
0 : No auto clear function
1 : Auto clear at occurrence of
0 : Ordinary
1 : Falling edge of R
Must always be “0”
Must always be “0”
Must always be “0”
Must always be “0”
Must always be “0”
Must always be “0”
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
0 : Transmit buffer empty (Tl = 1)
1 : Transmission completed
Must always be “0”
Invalid
Must always be “0”
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
clock
bus collision
(TXEPT = 1)
(TXEPT = 1)
(During UART mode)
(During UART mode)
16
) = “0”.
16
) bits 7 to 5 (DL2 to DL0 = SDA
Function
Function
X
D
2
(Note1)
M16C / 62N Group
R
R
Mitsubishi microcomputers
W
W
119