M30624FGNGP#D5 Renesas Electronics America, M30624FGNGP#D5 Datasheet - Page 229

IC M16C MCU FLASH 256K 100LQFP

M30624FGNGP#D5

Manufacturer Part Number
M30624FGNGP#D5
Description
IC M16C MCU FLASH 256K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Datasheet

Specifications of M30624FGNGP#D5

Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
20K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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226
Appendix Standard Serial I/O Mode 1 (Flash Memory Version)
Table 1.32.3. Status register 1 (SRD1)
Status Register 1 (SRD1)
SRD1 bits
SR15 (bit7)
SR14 (bit6)
SR13 (bit5)
SR12 (bit4)
SR11 (bit3)
SR10 (bit2)
SR9 (bit1)
SR8 (bit0)
Status register 1 indicates the status of serial communications, results from ID checks and results from
check sum comparisons. It can be read after the SRD by writing the read status register command (70
Also, status register 1 is cleared by writing the clear status register command (50
Table 1.32.3 gives the definition of each status register 1 bit. “00
and the flag status is maintained even after the reset.
Boot Update Completed Bit (SR15)
Flash Identification Value (SR14)
Check Sum Match Bit (SR12)
ID Check Completed Bits (SR11 and SR10)
Data Receive Time Out (SR9)
This flag indicates whether the control program was downloaded to the RAM or not, using the down-
load function.
This flag indicates whether the flash memor type is HND or DINOR.
This flag indicates whether the check sum matches or not when a program, is downloaded for execu-
tion using the download function.
These flags indicate the result of ID checks. Some commands cannot be accepted without an ID
check.
This flag indicates when a time out error is generated during data reception. If this flag is attached
during data reception, the received data is discarded and the microcomputer returns to the command
wait state.
Boot update completed bit
Flash identification value
ID check completed bits
Data receive time out
Check sum match bit
Status name
Reserved
Reserved
Update co
Time out
Match
HND
"1"
00
01
10
11
-
-
mpleted
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
Not verified
Verification mismatch
Reserved
Verified
Definition
” is output when power is turned ON
Normal operation
Not update
Mismatch
DINOR
"0"
16
-
-
M16C / 62N Group
).
Mitsubishi microcomputers
16
).

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