M30624FGNGP#D5 Renesas Electronics America, M30624FGNGP#D5 Datasheet - Page 128

• Manufacturer Part Number: M30624FGNGP#D5
• Description: IC M16C MCU FLASH 256K 100LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30624FGNGP#D5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Clock synchronous serial I/O mode
Figure 1.17.11. Typical transmit/receive timings in clock synchronous serial I/O mode
• Example of transmit timing (when internal clock is selected)
• Example of receive timing (when external clock is selected)
CLKi
Transfer clock
Transmit enable
bit (TE)
Transmit buffer
empty flag (Tl)
CTSi
TxDi
Transmit
register empty
flag (TXEPT)
Transmit interrupt
request bit (IR)
Receive enable
bit (RE)
Transmit enable
bit (TE)
Transmit buffer
empty flag (Tl)
RTSi
CLKi
RxDi
Receive complete
flag (Rl)
Receive interrupt
request bit (IR)
Shown in ( ) are bit symbols.
The above timing applies to the following settings:
Shown in ( ) are bit symbols.
• Internal clock is selected.
• CTS function is selected.
• CLK polarity select bit = “0”.
• Transmit interrupt cause select bit = “0”.
The above timing applies to the following settings:
f
EXT
• External clock is selected.
• RTS function is selected.
• CLK polarity select bit = “0”.
: frequency of external clock
“H”
“1”
“0”
“1”
“0”
“L”
“1”
“0”
“1”
“0”
“H”
“L”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
“1”
“0”
Transferred from UARTi receive register
Data is set in UARTi transmit buffer register
to UARTi receive buffer register
Cleared to “0” when interrupt request is accepted, or cleared by software
D
D
0
Transferred from UARTi transmit buffer register to UARTi transmit register
Dummy data is set in UARTi transmit buffer register
0
D
D
1
1
T
D
D
CLK
2
2
D
D
3
Transferred from UARTi transmit buffer register to UARTi transmit register
3
D
D
4
Tc
4
1 / f
Receive data is taken in
D
D
5
Cleared to “0” when interrupt request is accepted, or cleared by software
5
EXT
D
D
6
6
D
D
7
7
Stopped pulsing because CTS = “H”
Read out from UARTi receive buffer register
D
D
0
Tc = TCLK = 2(n + 1) / fi
0
D
D
1
1
Meet the following conditions are met when the CLK
input before data reception = “H”
fi: frequency of BRGi count source (f
n: value set to BRGi
D
• Transmit enable bit
• Receive enable bit
• Dummy data write to UARTi transmit buffer register
D
2
2
D
D
3
3
D
D
4
4
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
D
D
5
5
D
6
D
7
“1”
“1”
Stopped pulsing because transfer enable bit = “0”
D
0
1
D
, f
1
8
, f
D
M16C / 62N Group
32
2
Mitsubishi microcomputers
)
D
3
D
4
D
5
D
6
D
7
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