HD6477021X20V Renesas Electronics America, HD6477021X20V Datasheet - Page 148

MCU 5V 32K PB-FREE 100-TQFP

HD6477021X20V

Manufacturer Part Number
HD6477021X20V
Description
MCU 5V 32K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6477021X20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6477021X20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
8.4
In external memory space, strobe signal is output based on the assumption of a directly connected
SRAM. The external memory space is allocated to the following areas:
• Area 0 (when MD2–MD0 are 000 or 001)
• Area 1 (when the DRAM enable bit (DRAME) of the BCR is 0)
• Areas 2–4
• Area 5 (space where address A27 is 1)
• Area 6 (when the multiplexed I/O enable bit (IOE) bit of the BCR is 0, or space where address
• Area 7 (space where address A27 is 0)
8.4.1
The bus cycle for external memory space access is 1 or 2 states. The number of states is controlled
with the wait states by the settings of wait state control registers 1–3 (WCR1–WCR3). For details,
see section 8.4.2., Wait State Control. Figures 8.11 and 8.12 illustrate the basic timing of external
memory space access.
128 RENESAS
A27 is 1)
Figure 8.11 Basic Timing of External Memory Space Access (1-state read timing)
Accessing External Memory Space
Basic Timing
AD15–AD0
A21–A0
(Read)
(Read)
CSn
RD
CK
T1

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