HD6477021X20V Renesas Electronics America, HD6477021X20V Datasheet - Page 258

MCU 5V 32K PB-FREE 100-TQFP

HD6477021X20V

Manufacturer Part Number
HD6477021X20V
Description
MCU 5V 32K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6477021X20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6477021X20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
• Bit 1 (input capture/compare match B (IMFB)): IMFB indicates a GRB compare match or
Bit 1: IMFB
0
1
• Bit 0 (input capture/compare match A (IMFA)): IMFA indicates a GRA compare match or
Bit 0: IMFA
0
1
10.2.12 Timer Interrupt Enable Register (TIER)
The timer status interrupt enable register (TIER) is an eight-bit read/write register that controls
enabling/disabling of overflow interrupt requests and general register compare match/input capture
interrupt requests. TIER is initialized by a reset or standby mode to H'F8 or H'78. Each ITU
channel has one TIER (table 10.10).
Table 10.10 Timer Interrupt Enable Register (TIER)
Channel
0
1
2
3
4
240 RENESAS
input capture.
input capture.
Abbreviation
TIER0
TIER1
TIER2
TIER3
TIER4
Description
Clearing condition: Read IMFB when IMFB = 1, then write 0 in IMFB
(initial value)
Setting condition:
• GRB is functioning as an output compare register and TCNT = GRB
• GRB is functioning as an input capture register and the value of
Description
Read IMFA when IMFA = 1, then write 0 in IMFA (initial value).
Clearing condition: DMAC is activated by an IMIA interrupt (only
channels 0–3)
Setting condition:
• GRA is functions as an output compare register and TCNT = GRA
• GRA is functioning as an input capture register and the value of
TCNT is transferred to GRB by an input capture signal
TCNT is transferred to GRA by an input capture signal
Function
The TIER controls interrupt enable/disable.

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