HD6477021X20V Renesas Electronics America, HD6477021X20V Datasheet - Page 364

MCU 5V 32K PB-FREE 100-TQFP

HD6477021X20V

Manufacturer Part Number
HD6477021X20V
Description
MCU 5V 32K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6477021X20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6477021X20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Bit 3: STOP
0
1
Bit 2: MP
0
1
Bit 1: CKS1
0
1
Bit 3 (stop bit length (STOP)): STOP selects one or two bits as the stop bit length in the
asynchronous mode. This setting is used only in the asynchronous mode. It is ignored in the
clocked synchronous mode because no stop bits are added.
In receiving, only the first stop bit is checked, regardless of the STOP bit setting. If the second
stop bit is 1, it is treated as a stop bit. If the second stop bit is 0, it is treated as the start bit of
the next incoming character.
Bit 2 (multiprocessor mode (MP)): MP selects multiprocessor format. When multiprocessor
format is selected, settings of the parity enable (PE) and parity mode (O/E) bits are ignored.
The MP bit setting is used only in the asynchronous mode; it is ignored in the clocked
synchronous mode. For the multiprocessor communication function, see section 13.3.3,
Multiprocessor Communication.
Bits 1 and 0 (clock select 1 and 0 (CKS1 and CKS0)): CKS1 and CKS0 select the internal
clock source of the on-chip baud rate generator. Four clock sources are available: , /4, /16,
and /64. For further information on the clock source, bit rate register settings, and baud rate,
see section 13.2.8, Bit Rate Register.
Bit 0: CKS0
0
1
0
1
Description
One stop bit. In transmitting, a single bit of 1 is added at the end of
each transmitted character (initial value).
Two stop bits. In transmitting, two bits of 1 are added at the end of
each transmitted character.
Description
Multiprocessor function disabled (initial value)
Multiprocessor format selected
Description
System clock ( ) (initial value)
/4
/16
/64
RENESAS 347

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