HD6477021X20V Renesas Electronics America, HD6477021X20V Datasheet - Page 302

MCU 5V 32K PB-FREE 100-TQFP

HD6477021X20V

Manufacturer Part Number
HD6477021X20V
Description
MCU 5V 32K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6477021X20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6477021X20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
10.5.3
The ITU has compare match/input capture A interrupts, compare match/input capture B interrupts
and overflow interrupts for each channel. Each of the fifteen of these three types of interrupts are
allocated their own independently vectored addresses. When the interrupt’s interrupt request flag
is set to 1 and the interrupt enable bit is set to 1, the interrupt is requested.
The channel priority order can be changed with the interrupt controller. For more information, see
section 5, Interrupt Controller. The compare match/input capture A interrupts of channels 0–3 can
start the DMAC to transfer data. Table 10.17 lists the interrupt sources.
Table 10.17 ITU Interrupt Sources
Channel
0
1
2
3
4
Note: Indicates the initial status following reset. The ranking of channels can be altered using the
284 RENESAS
interrupt controller.
Interrupt Sources and Activating the DMAC
Interrupt
Source
IMIA0
IMIB0
OVI0
IMIA1
IMIB1
OVI1
IMIA2
IMIB2
OVI2
IMIA3
IMIB3
OVI3
IMIA4
IMIB4
OVI4
Description
Compare match or input capture A0
Compare match or input capture B0
Overflow 0
Compare match or input capture A1
Compare match or input capture B1
Overflow 1
Compare match or input capture A2
Compare match or input capture B2
Overflow 2
Compare match or input capture A3
Compare match or input capture B3
Overflow 3
Compare match or input capture A4
Compare match or input capture B4
Overflow 4
DMAC
Activation
Yes
No
No
Yes
No
No
Yes
No
No
Yes
No
No
No
No
No
Priority
Order*
High
Low

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