HD6477021X20V Renesas Electronics America, HD6477021X20V Datasheet - Page 310

• Manufacturer Part Number: HD6477021X20V
• Description: MCU 5V 32K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7020r

Specifications of HD6477021X20V

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

10.6.8
If an input capture signal is generated during the T3 state of a general register write cycle, the
input capture transfer takes priority and the write to the GR is not performed. The timing is shown
in figure 10.65.
10.6.9
When a counter is cleared by compare match, the counter is cleared in the last state in which the
TCNT value matches the GR value (when the TCNT is updated from the matching count to the
next count). The actual counter frequency is therefore given by the following formula:
292 RENESAS
Figure 10.65 Contention between General Register Write and Input Capture
f = /(N + 1)
(f: counter frequency. : operating frequency. N: value set in the GR.)
Contention between General Register Write and Input Capture
Note on Waveform Cycle Setting
Input capture
write signal
Address
Internal
TCNT
signal
GR
CK
T1
GR write cycle
GR address
T2
M
T3
M