HD6477021X20V Renesas Electronics America, HD6477021X20V Datasheet - Page 73

• Manufacturer Part Number: HD6477021X20V
• Description: MCU 5V 32K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7020r

Specifications of HD6477021X20V

• Core Processor: SH-1
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

Table 4.3
Exception Source
Reset
Address error, interrupt, instructions
Note: VBR: Vector base register. For vector table address offsets and vector numbers, see table
4.2
4.2.1
A reset is the highest-priority exception. There are two types of reset: power-on reset and manual
reset. As table 4.4 shows, a power-on reset initializes the internal state of the CPU and all registers
of the on-chip peripheral modules. A manual reset initializes the internal state of the CPU and all
registers of the on-chip peripheral modules except the bus state controller (BSC), pin function
controller (PFC) and I/O ports (I/O).
Table 4.4
Reset
Power-on Reset
Manual Reset
4.2.2
When the NMI pin is high, a low input at the RES pin drives the chip into the power-on reset state.
The RES pin should be driven low while the clock pulse generator (CPG) is stopped (or while the
CPG is operating during the oscillation settling time) for at least 20 t
reset. A power-on reset initializes the internal state of the CPU and all registers of the on-chip
peripheral modules. For pin states in the power-on reset state, see appendix B, Pin States.
While the NMI pin remains high, if the RES pin is held low for a certain time then driven high in
the power-on state, power-on reset exception processing begins. The CPU then:
1. Reads the start address (initial PC value) from the exception vector table.
2. Reads the initial stack pointer value (SP) from the exception vector table.
4.2.
Reset
Reset Types
Power-On Reset
Calculation of Exception Vector table Addresses
Reset Types
NMI
High
Low
Transition Conditions
RES
Low
Low
Calculation of Vector table Addresses
(Vector table address) = (vector table address offset) =
(vector number)
(Vector table address) = VBR + (vector table address offset)
= VBR + (vector number)
CPU
Initialize
Initialize
4
On-Chip Peripheral Module
Initialize
Initialize all except BSC, PFC and I/O
Internal State
4
cyc
to assure that the LSI is
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