HD6477021X20V Renesas Electronics America, HD6477021X20V Datasheet - Page 96

MCU 5V 32K PB-FREE 100-TQFP

HD6477021X20V

Manufacturer Part Number
HD6477021X20V
Description
MCU 5V 32K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6477021X20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6477021X20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
6.1
The user break controller (UBC) simplifies the debugging of user programs. Break conditions are
set in the UBC and a user break interrupt request is sent to the CPU in response to the contents of
a CPU or DMAC bus cycle. This function can implement an effective self-monitoring debugger,
enabling a program to be debugged by itself without using a large in-circuit emulator.
6.1.1
6.1.2
Figure 6.1 is the block diagram of the user break controller.
The following break conditions can be set:
When break conditions are met, a user break interrupt is generated. A user-created user break
interrupt exception routine can then be executed.
When a break is set to a CPU instruction fetch, the break occurs just before the fetched
instruction.
Address
CPU cycle or DMA cycle
Instruction fetch or data access
Read or write
Operand size (long word access, word access, or byte access)
Overview
Features
Block Diagram
Section 6 User Break Controller (UBC)
RENESAS 75

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