HD6477021X20V Renesas Electronics America, HD6477021X20V Datasheet - Page 221

MCU 5V 32K PB-FREE 100-TQFP

HD6477021X20V

Manufacturer Part Number
HD6477021X20V
Description
MCU 5V 32K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6477021X20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6477021X20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
202 RENESAS
detection and DACK active low) (Single address mode, bus cycle = DRAM bus cycle (long
detection and DACK active low) (Dual address mode, bus cycle = DRAM bus cycle (long
Note:
Note:
Figure 9.19 DREQ Sampling Timing in Cycle Steal Mode (Output with DREQ level
Figure 9.20 DREQ Sampling Timing in Cycle Steal Mode (Output with DREQ level
Bus cycle
Bus cycle
DREQ
DACK
DREQ
DACK
When DREQ is negated at the fourth state of the DMAC cycle, the next DMA transfer
will be executed because the sampling is done at the second state of the DMAC cycle.
When DREQ is negated at the fourth state of the DMAC cycle, the next DMA transfer
will be executed because the sampling is done at the second state of the DMAC cycle.
CK
CK
CPU
CPU
CPU
CPU
CPU
CPU
pitch normal mode))
pitch normal mode))
Tp
DMAC(R)
Tr
Tp
Tc
DMAC
Tr
Tc
Tc
DMAC
(W)
Tc
CPU
CPU
DMAC (W): DMAC write cycle
DMAC (R): DMAC read cycle
Tp
DMAC (R)
Tp
Tr
Tc
DMAC
Tr
Tc
Tc
DMAC
Tc
(W)
CPU
CPU

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