HD6477021X20V Renesas Electronics America, HD6477021X20V Datasheet - Page 218

MCU 5V 32K PB-FREE 100-TQFP

HD6477021X20V

Manufacturer Part Number
HD6477021X20V
Description
MCU 5V 32K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6477021X20V

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6477021X20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Note: Illustrates the case when DACK is output during the DMAC Read cycle.
Figure 9.13 to 9.22 show the sampling timing of the pin DREQ in the cycle steal mode for
each bus cycle. When no DREQ input is detected at the sampling after the aforementioned
DREQ detection, the next sampling occurs in the next stage in which a DACK signal is output.
If no DREQ input is detected at this time, sampling occurs at every state thereafter.
Figure 9.13 DREQ Sampling Timing in Cycle Steal Mode (Output with DREQ level
Figure 9.14 DREQ Sampling Timing in Cycle Steal Mode (Output with DREQ level
Bus cycle
Bus cycle
DREQ
DREQ
DACK
DACK
detection and DACK active low) (Single address mode, bus cycle = 1 state)
detection and DACK active low) (Dual address mode, bus cycle = 1 state)
CK
CK
CPU
CPU
CPU
CPU
CPU
CPU
DMAC (R) DMAC (W)
DMAC
CPU
DMAC (W): DMAC write cycle
DMAC (R): DMAC read cycle
CPU
CPU
CPU
CPU
RENESAS 199
CPU
CPU

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