UPD78F1203MC-CAB-AX Renesas Electronics America, UPD78F1203MC-CAB-AX Datasheet - Page 1008

• Manufacturer Part Number: UPD78F1203MC-CAB-AX
• Description: MCU 16BIT 78K0R/LX3 30-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1203MC-CAB-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Internal Oscillator Characteristics
1006
(T
Internal high-speed
oscillation clock
frequency
Internal low-speed
oscillation clock
frequency
Caution The pins mounted depend on the product. Refer to Caution 2 at the beginning of this chapter.
A
Notes 1.
Remark For details on the normal current mode and low consumption current mode according to the regulator
Oscillators
= −40 to +85°C, 2.7 V ≤ V
Note 1
2.
output voltage, refer to CHAPTER 22 REGULATOR.
This only indicates the oscillator characteristics. Refer to AC Characteristics for instruction execution
time.
Regulator output is set to low consumption current mode in the following cases:
• When the RMC register is set to 5AH.
• During RESET pin reset.
• In STOP mode (except during OCD mode).
• When both the high-speed system clock (f
• When both the high-speed system clock (f
40 MHz internal high-speed oscillation clock (f
CPU operation with the subsystem clock (f
40 MHz internal high-speed oscillation clock (f
subsystem clock (f
f
f
f
IH
IH40
IL
Parameters
DD
CHAPTER 28 ELECTRICAL SPECIFICATIONS
XT
= EV
Normal current mode
Low consumption current mode
)
DD
≤ 5.5 V, V
User’s Manual U19678EJ1V1UD
SS
Conditions
= EV
XT
MX
MX
) has been set.
), the high-speed internal oscillation clock (f
), the high-speed internal oscillation clock (f
SS
Note 2
IH40
2.7 V ≤ V
IH40
= AV
) are stopped during the HALT mode when the
) are stopped during CPU operation with the
SS
DD
= 0 V)
≤ 5.5 V
7.856
38.38
MIN.
25.5
27
TYP.
40
30
30
8
MAX.
8.144
41.16
34.5
33
IH
IH
), and the
), and the
MHz
MHz
Unit
kHz
kHz