UPD78F1203MC-CAB-AX Renesas Electronics America, UPD78F1203MC-CAB-AX Datasheet - Page 570

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UPD78F1203MC-CAB-AX

Manufacturer Part Number
UPD78F1203MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1203MC-CAB-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1203MC-CAB-AX
Manufacturer:
RENESAS
Quantity:
15 000
Part Number:
UPD78F1203MC-CAB-AX
Manufacturer:
NEC
Quantity:
20 000
10.4.4 Setting watchdog timer interval interrupt
generated when 75% of the overflow time is reached.
568
Depending on the setting of bit 7 (WDTINT) of an option byte (000C0H), an interval interrupt (INTWDTI) can be
Caution When operating with the X1 oscillation clock after releasing the STOP mode, the CPU starts
Remark The watchdog timer continues counting even after INTWDTI is generated (until ACH is written to the
WDTINT
Remarks 1.
0
1
operating after the oscillation stabilization time has elapsed.
Therefore, if the period between the STOP mode release and the watchdog timer overflow is
short, an overflow occurs during the oscillation stabilization time, causing a reset.
Consequently, set the overflow time in consideration of the oscillation stabilization time when
operating with the X1 oscillation clock and when the watchdog timer is to be cleared after the
STOP mode release by an interval interrupt.
WDTE register). If ACH is not written to the WDTE register before the overflow time, an internal reset
signal is generated.
Interval interrupt is used.
Interval interrupt is generated when 75% of overflow time is reached.
<When window open period is 25%>
• Overflow time:
• Window close time:
• Window open time:
2.
Window close time
Window open time
2
0 to 2
2
= 28.44 to 31.03 ms
10
10
If the overflow time is set to 2
f
/f
/f
IL
IL
IL
Table 10-5. Setting of Watchdog Timer Interval Interrupt
: Internal low-speed oscillation clock frequency
(MAX.) = 2
10
(MIN.) × (1 − 0.25) to 2
/f
IL
(MIN.) × (1 − 0.25) = 0 to 2
10
CHAPTER 10 WATCHDOG TIMER
/33 kHz (MAX.) = 31.03 ms
0 to 28.44 ms
28.44 to 31.03
ms
User’s Manual U19678EJ1V1UD
Use of Watchdog Timer Interval Interrupt
25%
10
10
/f
/f
IL
IL
, the window close time and open time are as follows.
(MAX.) = 2
10
0 to 18.96 ms
18.96 to 31.03
ms
/27 kHz (MIN.) × 0.75 = 0 to 28.44 ms
Setting of Window Open Period
50%
10
/27 kHz (MIN.) × 0.75 to 2
0 to 9.48 ms
9.48 to 31.03 ms
75%
None
0 to 31.03 ms
10
/33 kHz (MAX.)
100%

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