UPD78F1203MC-CAB-AX Renesas Electronics America, UPD78F1203MC-CAB-AX Datasheet - Page 230

• Manufacturer Part Number: UPD78F1203MC-CAB-AX
• Description: MCU 16BIT 78K0R/LX3 30-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1203MC-CAB-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

228
Address: FFFA0H
Symbol
CMC
Cautions 1. CMC can be written only once after reset release, by an 8-bit memory
(Caution and Remark are given on the next page.)
Note
OSCSELS
EXCLK
EXCLK
AMPH
7
0
0
1
1
0
1
0
1
Figure 5-3. Format of Clock Operation Mode Control Register (CMC)
OSCSELS bit is not provided in the 78K0R/IB3. In the 78K0R/IB3, bit 4 is fixed to 0.
After reset: 00H
Note
2. After reset release, set CMC before X1 or XT1 oscillation is started as set by the
3. Be sure to set AMPH to 1 if the X1 clock oscillation frequency exceeds 10 MHz.
4. When CMC is used at the default value (00H), be sure to set 00H to this register
5. The XT1 oscillator is a circuit with low amplification in order to achieve low-
Input port mode
XT1 oscillation mode
2 MHz ≤ f
10 MHz < f
OSCSEL
manipulation instruction.
clock operation status control register (CSC).
after reset release in order to prevent malfunctioning during a program loop.
power consumption. Note the following points when designing the circuit.
OSCSEL
Subsystem clock pin operation mode
• Pins and circuit boards include parasitic capacitance. Therefore, perform
• Configure the circuit of the circuit board, using material with little wiring
• Place a ground pattern that has the same potential as V
• Be sure that the signal lines between the XT1 and XT2 pins, and the
6
0
1
0
1
oscillation evaluation using a circuit board to be actually used and confirm
that there are no problems.
resistance.
possible near the XT1 oscillator.
resonators do not cross with the other signal lines. Do not route the wiring
near a signal line through which a high fluctuating current flows.
MX
MX
≤ 10 MHz
CHAPTER 5 CLOCK GENERATOR
Input port mode
X1 oscillation mode
Input port mode
External clock input mode
≤ 20 MHz
High-speed system clock
R/W
pin operation mode
User’s Manual U19678EJ1V1UD
Control of high-speed system clock oscillation frequency
0
5
OSCSELS
Note
4
Input port
Crystal resonator connection
Input port
Crystal/ceramic resonator connection
Input port
Input port
3
0
XT1/P123 pin
X1/P121 pin
2
0
External clock input
X2/EXCLK/P122 pin
1
0
XT2/P124 pin
SS
AMPH
as much as
0