UPD78F1203MC-CAB-AX Renesas Electronics America, UPD78F1203MC-CAB-AX Datasheet - Page 531

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UPD78F1203MC-CAB-AX

Manufacturer Part Number
UPD78F1203MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1203MC-CAB-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1203MC-CAB-AX
Manufacturer:
RENESAS
Quantity:
15 000
Part Number:
UPD78F1203MC-CAB-AX
Manufacturer:
NEC
Quantity:
20 000
Notes 1. If OAEN = 1 (bit 7 of programmable gain amplifier control register (OAM)) and CnEN bit is set to 1, a
Cautions 1. Rewrite CnINV and CnDFS2 to CnDFS0 after setting the comparator output to the
Remarks 1. f
2. There is no positive-side external input pin for comparator 1 in the 78K0R/IB3. Only the signal
programmable gain amplifier output signal will be input to the positive-side input of comparator n.
output from the programmable gain amplifier can be used as the positive-side input for comparator 1.
2. n = 0, 1
2. With the noise elimination width, an extra CPU clock (f
3. To operate the comparator in combination with a programmable gain amplifier, set the
4. The negative-side external pin input of the comparator will be cutoff when CnVRE of the
5. Enable interrupt signals after setting CnEN = 1 and then waiting for 1
disabled state (CnOE = 0).
setting value.
(Example: When f
300 ns)
operation of the comparator after setting the operation of the programmable gain
amplifier (see Figure 8-11 and Figure 8-12).
CnRVM register is set (1), regardless of the value that enables or disables the comparator
operation (CnEN).
CLK
: CPU or peripheral hardware clock frequency
CHAPTER 8 COMPARATORS/PROGRAMMABLE GAIN AMPLIFIERS
CLK
= 20 MHz, CnDFS2 to CnDFS0 = 001, noise elimination width = 250 to
User’s Manual U19678EJ1V1UD
CLK
) may be eliminated from the
μ
s by software.
529

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