UPD78F1203MC-CAB-AX Renesas Electronics America, UPD78F1203MC-CAB-AX Datasheet - Page 918

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UPD78F1203MC-CAB-AX

Manufacturer Part Number
UPD78F1203MC-CAB-AX
Description
MCU 16BIT 78K0R/LX3 30-SSOP
Manufacturer
Renesas Electronics America
Series
78K0R/Ix3r
Datasheet

Specifications of UPD78F1203MC-CAB-AX

Core Processor
78K/0R
Core Size
16-Bit
Speed
40MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F1203MC-CAB-AX
Manufacturer:
RENESAS
Quantity:
15 000
Part Number:
UPD78F1203MC-CAB-AX
Manufacturer:
NEC
Quantity:
20 000
Remarks 1.
916
System clock
CPU
Flash memory
RAM
Port (latch)
Timer array unit TAUS
Real-time counter (RTC)
Watchdog timer
Clock output/buzzer output
A/D converter
Programmable gain amplifier
Comparator
Serial array unit (SAU)
Serial interface (IICA)
Multiplier/divider
DMA controller
Power-on-clear function
Low-voltage detection function
External interrupt
Main system clock
Subsystem clock
f
IL
2.
Item
f
f
f
f
f
f
The functions mounted depend on the product.
Functions.
IH
IH40
X
EX
XT
IL
f
f
f
f
IH
X
EX
XT
, f
IH40
: Internal high-speed oscillation clock
: 40 MHz internal high-speed oscillation clock
: X1 clock
: External main system clock
: XT1 clock
: Internal low-speed oscillation clock
Table 19-1. Operation Statuses During Reset Period
Clock supply to the CPU is stopped.
Operation stopped
Operation stopped (X1 and X2 pins are input port mode)
Clock input invalid (pin is input port mode)
Operation stopped (XT1 and XT2 pins are input port mode)
Operation stopped
Operation stopped (The value, however, is retained when the voltage is at least the power-on-
clear detection voltage.)
Set P140 to low-level output. The port pins except for P140 become high impedance.
Operation stopped
Detection operation is possible
Operation stopped (however, operation continues at LVI reset)
Operation stopped
CHAPTER 19 RESET FUNCTION
User’s Manual U19678EJ1V1UD
During Reset Period
See 1.6
Block Diagram and 1.7
Outline of

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