UPD78F1203MC-CAB-AX Renesas Electronics America, UPD78F1203MC-CAB-AX Datasheet - Page 110

• Manufacturer Part Number: UPD78F1203MC-CAB-AX
• Description: MCU 16BIT 78K0R/LX3 30-SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Ix3r

Specifications of UPD78F1203MC-CAB-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

• Processor mode control register (PMC)
3.1.3 Internal data memory space
Four general-purpose register banks consisting of eight 8-bit registers per bank are assigned to the 32-byte area of
FFEE0H to FFEFFH of the internal RAM area. However, instructions cannot be executed by using general-purpose
registers.
108
This register selects the flash memory space for mirroring to area from F0000H to FFFFFH.
PMC can be set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets this register to 00H.
Cautions 1. Be sure to clear bit 0 (MAA) of this register to 0 (default value).
The 78K0R/Ix3 products incorporate the following RAMs.
The internal RAM can be used as a data area and a program area where instructions are written and executed.
The internal RAM is used as a stack memory.
Cautions 1. It is prohibited to use the general-purpose register (FFEE0H to FFEFFH) space for fetching
Address: FFFFEH After reset: 00H R/W
Symbol
PMC
2. Set PMC register only once during the initial settings prior to operating the DMA controller.
3. After setting PMC register, wait for at least one instruction and access the mirror area.
2. While using the self-programming function, the area of FFE20H to FFEFFH cannot be used as
Figure 3-5. Format of Configuration of Processor Mode Control Register (PMC)
Rewriting PMC register other than during the initial settings is prohibited.
instructions or as a stack area.
a stack memory. Furthermore, the areas of FF300H to FF6FFH also cannot be used as stack
memories with the
μ
μ
μ
μ
PD78F1201, 78F1211
PD78F1203, 78F1213, 78F1223, 78F1233
PD78F1214, 78F1224, 78F1234
PD78F1215, 78F1225, 78F1235
MAA
7
0
0
1
00000H to 0FFFFH is mirrored to F0000H to FFFFFH
Setting prohibited
Selection of flash memory space for mirroring to area from F0000H to FFFFFH
Part Number
6
0
μ
PD78F1215, 78F1225, 78F1235, respectively.
Table 3-4. Internal RAM Capacity
CHAPTER 3 CPU ARCHITECTURE
User’s Manual U19678EJ1V1UD
5
0
4
0
1024 × 8 bits (FEB00H to FFEFFH)
1536 × 8 bits (FE900H to FFEFFH)
2048 × 8 bits (FE700H to FFEFFH)
3072 × 8 bits (FE300H to FFEFFH)
3
0
Internal RAM
2
0
1
0
MAA
<0>